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參數(shù)資料
| 型號： | SAA7138 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | The Digital Video Decoder/Encoder Modules(數(shù)字視頻譯碼器/編碼器模塊) |
| 中文描述： | 數(shù)字視頻解碼器/編碼器模塊（數(shù)字視頻譯碼器/編碼器模塊） |
| 文件頁數(shù)： | 8/53頁 |
| 文件大小： | 456K |
| 代理商： | SAA7138 |
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8
Module System: 7128MOD2
Philips Semiconductors
Application Note
AN 97085
latched at the rising, the other one at the falling clock edge. Therefore a special Y-module is designed (available
Jan. ’98). This Y-module will provide two input module connectors with multiplexer, an EPROM with CCIR 656
data and a centronic interface to generate a 54MHz interlaced data stream (see chapter 3.).
After passing the analog postfilters (to be be disabled with jumper) the output signal is available simultaneously
as CVBS, Y/C (and RGB) at the respective connectors (SCART for CVBS, Y/C, RGB and additionally a subclick
connector for CVBS output). An adaptor from SCART to Mini Din and Cinch is part of the accessory. To prevent
a wrong termination, be sure that the CVBS0 signal is not switched to the CVBS output connector and the SCART
output (CVBS output or RGB-SYNC) at the same time (JP14, JP15).
Fig.1 Location of ICs, jumpers and connectors on the 7128MOD2 PCB
Fig.1 shows the location of IC’s, jumpers and connectors on the application module 7128MOD2. The function of
the used connectors is described on page 10. The function of jumpers is shown in a jumper list on page 16.
a
b
c
D
SPARE
71__MOD2 V1.0
D
DGND
AGND
A0
A1
A2
U5
CVBS
U
N
O
+5VD
DGND
+5VA
AGND
-5VA
27 MHz
RESET
C
C
Filter off ||
Filter on =
Y
R
B
G
S
Filter
Source
RESN
Extern
Switch
I2C
3,3V
5V
U4
SAA7120/21
SAA7126/27
SAA7128/29
SAA7138/39
PHILIPS MPC-E/PD
October 1997
TERMLLC_2
TERMLLC_1
CVBS1
CVBS2
S
SA
LLCB
CLKOUT
LLCA
LLCOUT
LLC_1
XCLK
LLC_2
HS to RCV2
VS
RCV1
ODD
CVBS1
CVBS2
CVBS0
Y/C / RGB
Y/C / CVBS
RGB
active
Y/C
SAA7126/27
I2C EEPROM
I
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