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參數(shù)資料
| 型號： | SAA7138 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | The Digital Video Decoder/Encoder Modules(數(shù)字視頻譯碼器/編碼器模塊) |
| 中文描述： | 數(shù)字視頻解碼器/編碼器模塊（數(shù)字視頻譯碼器/編碼器模塊） |
| 文件頁數(shù)： | 11/53頁 |
| 文件大?。?/td> | 456K |
| 代理商： | SAA7138 |
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Module System: 7128MOD2
Philips Semiconductors
11
Application Note
AN 97085
TABLE 2 Description of signals on the VG96 module input connector
*: only for SAA7138/39
Signal
Specification
SDA
SCL
I
2
C-bus serial data.
I
2
C-bus serial clock.
Reset Not Input (active LOW). After Reset is applied, all digital I/O’s are
in input mode; PAL-Blackburst on CVBS, VBS and C; RGB outputs set to
lowest voltage. The I2C-bus receiver waits for the START condition.
Double speed 54MHz MPEG port. Input for CCIR 656 style multiplexed
Cb, Y, Cr data. Data are sampled at the rising and falling clock edge;
data sampled on the rising edge then are sent to the encoding part of the
device, data sampled on the falling edge are sent to the RGB part of the
device (or vice versa, depending on programming)
Data port input for CCIR 656 style multiplexed Cb, Y, Cr data.
Line-Locked clock input 1; this is the 27MHz master clock (via JP13A)
Line-Locked clock input 2; this is the alternative source for the 27MHz
master clock (via JP13)
Line-Locked clock output, this is the buffered output for the selected
27MHz master clock (via JP13A)
Fast switch between DP and MP port. If the fader is bypassed, a HIGH
selects MP port, a LOW selects DP port.
Horizontal Synchronous signal for synchronization via RCV2.
Vertical Synchronous signal for synchronization via RCV1 (JP9).
ODD/EVEN Field Identification, for synchronization via RCV1 (JP9).
Raster Control 1, this pin provides or receives a VS, FS or FSEQ signal.
Raster Control 2, this pin provides an HS pulse of programmable length
or receives an HS pulse.
Real Time Control input. If the LLC clock is provided by a digital video
decoder like SAA7111A, supporting this function. RTCI should be con-
nected to the RTCO pin of the respective decoder to get information con-
cerning actual subcarrier, PAL-ID, and more, depending on the video
decoder.
Teletext Request output, indicating when the bit stream is requested.
Teletext bit stream input.
RESN
MP (7..0)
DP* (7..0)
LLC_1
LLC_2*
CLKOUT*
SOURCE*
HS
VS
ODD
RCV1
RCV2
RTCI
TTXRQ
TTX
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| SAA7140B | High Performance Scaler HPS |
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相關代理商/技術參數(shù) |
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| SAA7140A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:High Performance Scaler HPS |
| SAA7140B | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:High Performance Scaler HPS |
| SAA7144HL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Quadruple video input processor |
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| SAA7146 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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