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| 型號： | SAA4998H |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Field and line rate converter with noise reduction and embedded memory |
| 中文描述： | 場和符合降噪和嵌入式存儲器率轉(zhuǎn)換器 |
| 文件頁數(shù)： | 10/39頁 |
| 文件大?。?/td> | 175K |
| 代理商： | SAA4998H |
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2004 Feb 18
10
Philips Semiconductors
Product specification
Field and line rate converter with noise
reduction and embedded memory
SAA4998H
Notes
1.
2.
Not used input pins should be connected to ground.
Because of the noisy characteristic of the supply voltage of output pads (V
DDE
), it is recommended not to connect
V
DDE
directly at the high supply voltage of the intern field memories (V
DDP
). All pins V
DDE
should be buffered as close
as possible to the device. V
DDP
needs a low noise supply voltage, therefore, it is recommended that V
DDP
has to be
separated from V
DDE
by an external filter structure. Because of the high working frequency of the device, it is also
recommended to filter the core supply voltage (V
DDD
). All pins V
DDD
should be buffered as close as possible to the
device.
V
SSD
, V
SSM
and V
SSS
are connected internally.
REF rising edge must be after rising edge of SNRST in order to be detected.
3.
4.
V
DDM
V
SSM
YG6/DPIP6
98
99
100
supply
ground
output/input
supply voltage of the internal field memories (1.8 V)
field memory ground
PIP mode disabled: bus G luminance output bit 6;
PIP mode enabled: PIP data input bit 6
SYMBOL
PIN
TYPE
DESCRIPTION
(1)(2)(3)
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