參數(shù)資料
型號： SAA2502H
廠商： NXP SEMICONDUCTORS
元件分類： 消費家電
英文描述： ISO/MPEG Audio Source Decoder
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP44
封裝： PLASTIC, SOT-307, QFP-44
文件頁數(shù)： 44/64頁
文件大?。?/td> 318K
代理商： SAA2502H
1997 Nov 17
44
Philips Semiconductors
Preliminary specification
ISO/MPEG Audio Source Decoder
SAA2502
8
APPENDIX
8.1
L3 interface specification
8.1.1
I
NTRODUCTION
The main purpose of the interface definition is to define a
protocol that allows for the transfer of control information
and operational details between a microcontroller and a
number of slave devices, at a rate that exceeds other
common interfaces, but with a sufficient low complexity for
application in consumer products. It should be clearly
noted that the current interface definition is intended for
use in a single apparatus, preferably restricted to a single
printed circuit board.
The interface requires 3 signal lines (apart from a return
‘ground’) between the microcontroller and the slave
devices (from this the name ‘L3’ is derived). These 3-lines
are common to all ICs connected to the bus:
1.
L3MODE
2.
L3DATA
3.
L3CLK.
L3MODE and L3CLK are always driven by the
microcontroller, L3DATA is bidirectional:
Table 54
The 3-lines common to all ICs; L3MODE,
L3CLK and L3DATA
Notes
1.
L3MODE is used for the identification of the operation
mode.
L3CLK is the bit clock to which the information transfer
will be synchronized.
L3DATA will carry the information to be transferred.
2.
3.
SIGNAL
MICROCONTROLLER
SLAVE
DEVICE
L3MODE
(1)
L3CLK
(2)
L3DATA
(3)
output
output
output/input
input
input
input/output
All slave devices in the system can be addressed using a
6 bit address. This allows for up to 63 different slave
devices, as the all ‘0’ address is reserved for special
purposes.
In operation 2 modes can be identified:
1.
Addressing Mode (AM).
During addressing mode a single byte is sent by the
microcontroller. This byte consists of 2 Data Operation
Mode (DOM) bits and 6 Operational Address (OA)
bits. Each of the slave devices evaluates the
operational address. Only the device that has been
issued the same operational address will become
active during the following data mode. The operation
to be executed during the data mode is indicated by
the two data operation mode bits.
2.
Data Mode (DM).
During data mode information is transferred between
microcontroller and slave device. The transfer
direction may be from microcontroller to slave (‘write’)
or from slave to microcontroller (‘read’). However,
during one data mode the transfer direction can not
change.
8.1.1.1
Addressing mode
In order to start an addressing mode the microcontroller
will make the L3MODE line LOW. The L3CLK line is
lowered 8 times during which the L3DATA line transfers
8 bits. The information is presented LSB first and remains
stable during the LOW phase of the L3CLK signal.
The addressing mode is ended by making the L3MODE
line HIGH.
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