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參數(shù)資料
| 型號： | SAA2502H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | ISO/MPEG Audio Source Decoder |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP44 |
| 封裝： | PLASTIC, SOT-307, QFP-44 |
| 文件頁數(shù)： | 27/64頁 |
| 文件大?。?/td> | 318K |
| 代理商： | SAA2502H |
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1997 Nov 17
27
Philips Semiconductors
Preliminary specification
ISO/MPEG Audio Source Decoder
SAA2502
handbook, full pagewidth
MBH974
220 pF
+
2.5 V
220 pF
390 pF
TDA1308T
SAA2502H
neg
pos
output
11 k
10 k
10 k
10 k
10 k
100
μ
F
11 k
10 k
Fig.17 External low-pass filters
7.6
Control interface module
7.6.1
R
ESETTING
Table 18
Resetting is performed by 2 signals
A rising edge of the signal STOP triggers the next event.
The decoding process is interrupted and the input buffer is
flushed. Consequently audio frame synchronization is
abandoned and the decoder starts searching for a new
sync in the coded input data stream. In the meantime the
output interface is soft muted (i.e. the output signal fades
away in approximately 500 samples).
There are several other events that have the same effect
as a rising edge of the STOP signal:
Change of the current MPEG layer in the input stream
Change of the current sampling frequency in the input
stream
Change of the current bit rate in the input stream
(variable bit rate is NOT supported)
Change of current input interface mode
(INMOD1 and 0) and/or audio frame synchronization
mode (SYMOD1 and 0) setting
Enforcement of a soft reset through the control interface.
There is also a level triggered effect which remains
provided STOP is asserted. When the STOPRQ control
flag is set input data requesting will be halted, otherwise
normal input interface behaviour will continue at the bit rate
that was valid before STOP assertion but all data is
SIGNAL
DIRECTION
FUNCTION
STOP
RESET
input
input
soft reset and stop decoding
hard reset: force default
settings
considered to be unreliable (as if CDEF were asserted).
Consequently frame synchronization and decoding will not
resume until STOP is de-asserted.
The hard reset signal RESET has the same effect as
STOP but it will also force the control interface settings into
their default states. RESET must stay high during at least
24 MCLKIN periods if MCLK24 = logic 1 or 12 MCLKIN
periods if MCLK24 = logic 0.
7.6.2
I
NTERRUPTS
The SAA2502 is able to generate an interrupt upon the
occurrence of one or more of the following events:
Status bit DST0 has been set (i.e. ancillary/PAD data,
frame headers and error report are available)
Rising edge of STOP input signal
MPEG CRC check failed
Status bit INSYNC has been set
Status bit INSYNC has been cleared.
For more information on these items see Sections 7.6.6.1
and 7.6.6.9.
Each of these interrupts sources may be enabled or
disabled as required by the application. After a hard reset
all interrupt sources are disabled. When the host
processor is interrupted by the SAA2502 it should read the
interrupt event register to find out which event or events
caused the interrupt. Reading this register will also clear all
pending interrupts.
The interrupt pin is active LOW (INT = logic 0 indicates an
interrupt) and it is of the ‘open drain’ type. Consequently it
is allowed to ‘wire OR’ this pin with interrupt pins of the
same type of other devices. For correct operation an
external pull-up resistor should be provided.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA2503 | MPEG2 audio decoder(MPEG2 音頻譯碼器) |
| SAA2503HT | MPEG2 audio decoder |
| SAA2505H-M1 | Digital multi-channel audio IC DUET |
| SAA2505 | Digital multi-channel audio IC DUET |
| SAA2505H | RES 4.99K OHM 1/16W 0.5% 0402SMD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA2503 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG2 audio decoder |
| SAA2503HT | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG2 audio decoder |
| SAA2505 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital multi-channel audio IC DUET |
| SAA2505H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital multi-channel audio IC DUET |
| SAA2505H-M1 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital multi-channel audio IC DUET |
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