- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄372108 > SAA2502H (NXP SEMICONDUCTORS) ISO/MPEG Audio Source Decoder PDF資料下載
參數(shù)資料
| 型號： | SAA2502H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | ISO/MPEG Audio Source Decoder |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP44 |
| 封裝： | PLASTIC, SOT-307, QFP-44 |
| 文件頁數(shù)： | 29/64頁 |
| 文件大?。?/td> | 318K |
| 代理商： | SAA2502H |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁當(dāng)前第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁
1997 Nov 17
29
Philips Semiconductors
Preliminary specification
ISO/MPEG Audio Source Decoder
SAA2502
7.6.5
T
RANSFER PROTOCOLS
7.6.5.1
L3 transfer protocol
The protocol enables writing of settings and reading of status and/or data. In this protocol, the host first issues a 6-bit
wide ‘device address’ on CDATA while CMODE = logic 0. All devices connected to the bus read this address. Then data
transfers to or from the host are carried out while CMODE = logic 1. All devices with a different device address must
neglect these data transfers until the next address is issued. Only the device with an address equal to the issued device
address performs the transfer.
Table 20
L3 device address.
Note
1.
The ‘Data Operation Mode’ bits DOM1 and DOM0 define the current sub-mode of the control interface until the next
time a device address is issued (see Table 21).
Table 21
DOM1 and DOM0 bits
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
DOM1
(1)
BIT 0
DOM0
(1)
0
1
1
0
0
0
DOM1
DOM0
FUNCTION
0
0
1
1
0
1
0
1
data (new local register contents) sent to the SAA2502
data (current local register contents) sent to the microcontroller
local register address sent to the SAA2502
short (1 byte) SAA2502 status report sent to the microcontroller
Fig.18 Microcontroller interface initialization procedure.
(1) The value of the CMODE signal while RESET is asserted defines the microcontroller interface mode; CMODE = logic 1 = I
2
C-bus,
CMODE = logic 0 = L3. No transfers can be performed (CCLK stays HIGH).
(2) L3 mode of operation only. For a correct initialization of the interface unit, it is mandatory to make CMODE HIGH and LOW again after RESET has
been de-asserted. This must occur before any L3 transfer (even to or from other devices) is performed. As shown CCLK should stay HIGH during
this step.
(3) Now the first transfer can be performed on the microcontroller bus.
Any deviation from these steps may result in undefined behaviour of the microcontroller interface, even with the possibility of disturbing transfers
to other devices connected to the control bus.
At a hard reset, all writeable data items are forced to their default values.
handbook, full pagewidth
MGE482
RESET
CMODE
CCLK
I
2
C-bus mode
L3 mode
(1)
(2)
(3)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA2503 | MPEG2 audio decoder(MPEG2 音頻譯碼器) |
| SAA2503HT | MPEG2 audio decoder |
| SAA2505H-M1 | Digital multi-channel audio IC DUET |
| SAA2505 | Digital multi-channel audio IC DUET |
| SAA2505H | RES 4.99K OHM 1/16W 0.5% 0402SMD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA2503 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG2 audio decoder |
| SAA2503HT | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG2 audio decoder |
| SAA2505 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital multi-channel audio IC DUET |
| SAA2505H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital multi-channel audio IC DUET |
| SAA2505H-M1 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital multi-channel audio IC DUET |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。