
September 1994
4
Philips Semiconductors
Preliminary specification
MPEG Audio Source Decoder
SAA2500
PINNING
SYMBOL
PIN
DESCRIPTION
TYPE
RESET
FSCLK
FSCLKIN
MCLK
V
DD1
GND
MCLKOUT
MCLKIN
X22OUT
X22IN
STOP
URDA
CDMWS
CDMEF
CDM
CDMCL
GND
CDSCL
CDS
CDSEF
CDSWA
CDSSY
L3CLK
L3DATA
L3MODE
SD
TA
GND
SCK
WS
TO
TI
TB
V
DD2
TC1
TC0
TDO
TRST
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
master reset
sample rate clock; buffered signal
sample rate clock input
master clock; buffered signal
supply voltage
supply ground
master clock oscillator output
master clock oscillator input or signal input
22.579 MHz clock oscillator output
22.579 MHz clock oscillator input or signal input
stop decoding
unreliable data input; interrupt decoding
coded data (master input) word select output
coded data (master input) error flag input
ISO/MPEG coded data (master input)
coded data (master input) bit clock output
supply ground
coded data (slave input) bit clock
ISO/MPEG coded data (slave input)
coded data (slave input) error flag
coded data (slave input) window signal
coded data (slave input) frame sync
L3 interface bit clock
L3 interface serial data
L3 interface address/data select input
baseband audio I
2
S data output
do not connect; reserved
supply ground
baseband audio data I
2
S clock output
baseband audio data I
2
S word select output
connect to TI (pin 32)
connect to TO (pin 31)
do not connect; reserved
supply voltage
do not connect; factory test control 1 input, with integrated pull-down resistor
do not connect; factory test control 0 input, with integrated pull-down resistor
boundary scan test data output
boundary scan test reset input; this pin should be connected to ground for
normal operation
boundary scan test clock input
I
O
I
O
O
I
O
I
I
I
O
I
I
O
I
I
I
I
I
I
I/O
I
O
O
O
O
O
I
O
I
I
O
I
TCK
39
I