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參數(shù)資料
| 型號： | SAA2500 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | MPEG Audio Source Decoder |
| 中文描述： | MPEG音頻源解碼器 |
| 文件頁數(shù)： | 32/47頁 |
| 文件大小： | 199K |
| 代理商： | SAA2500 |
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September 1994
32
Philips Semiconductors
Preliminary specification
MPEG Audio Source Decoder
SAA2500
Table 32
Preferred allocations.
DOM1
DOM0
FUNCTION
REMARKS
0
0
1
1
0
1
0
1
data from microcontroller to SAA2500
data from SAA2500 to microcontroller
control from microcontroller to SAA2500
status from SAA2500 to microcontroller
general purpose data transfer
general purpose data transfer
e.g. register selection for data transfer
short device status message
handbook, halfpage
0
1
2
3
4
5
6
7
L3CLK
L3DATA
MGB505
Fig.16 Addressing mode.
The meaning of the bits on L3DATA.
Bit 0 and bit 1; these are the data operation mode (DOM) bits that indicate the nature of the following data transfer. Each slave device may have
its own allocation of operation modes to the 4 possible codes of these bits. For correct information about the operation the device will perform, refer
to the descriptions of the individual IC's. For new designs the preferred allocations are given in Table 32.
Bit 2 to bit 7; these bits act as 6 bit (special function) operational IC address, with bit 7 as MSB and bit 2 as LSB. Bit 7 to bit 5 act as system
identification and bit 4 to bit 2 as identification of the device within the system.
Special function operational address
Operational address 000000 (bit 2 to bit 7) is the special
function address, and is used for the L3 device reset, as
well as for the declaration and invalidation of the extended
addressing. Both will be explained in Sections “Device
interface reset” and “Extended addressing”.
Data mode
In the data mode the microcontroller sends or receives
information to or from the selected device. During data
transfer the L3MODE line is HIGH. The L3CLK line is
lowered 8 times during which the L3DATA line carries
8 bits. The information is presented LSB first and remains
stable during the LOW phase of the L3CLK signal.
The preferred basic data transfer unit is an 8 bit byte.
Some implementations that are modifications of older
circuits with 16 bit registers may use a basic unit of 16 bits,
transferred as 2 bytes, with the most significant byte
presented first. No other basic data transfer unit is allowed.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA2500H | MPEG Audio Source Decoder |
| SAA2501 | Digital Audio Broadcast DAB decoder |
| SAA2501H | Digital Audio Broadcast DAB decoder |
| SAA2502 | ISO/MPEG Audio Source Decoder |
| SAA2502H | ISO/MPEG Audio Source Decoder |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA2500GP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video Processing/ENDEC for MPEG |
| SAA2500H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG Audio Source Decoder |
| SAA2500HB-S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video Processing/ENDEC for MPEG |
| SAA2501 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Audio Broadcast DAB decoder |
| SAA2501H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Audio Broadcast DAB decoder |
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