- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄372108 > SAA2023 (NXP Semiconductors N.V.) Drive processor for DCC systems PDF資料下載
參數(shù)資料
| 型號： | SAA2023 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Drive processor for DCC systems |
| 中文描述： | 戴納信貸驅動處理器的系統(tǒng) |
| 文件頁數(shù)： | 2/56頁 |
| 文件大?。?/td> | 274K |
| 代理商： | SAA2023 |
第1頁當前第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁
May 1994
2
Philips Semiconductors
Preliminary specification
Drive processor for DCC systems
SAA2023
FEATURES
Operating supply voltage: 4.5 to 5.5 V
Low power dissipation: 260 mW at 5.0 V
Single chip digital equalizer, tape formatting and error
correction
8-bit flash analog-to-digital converter (ADC) for low
symbol error rate
Two switchable Infinite Impulse-Response (IIR) filter
sections
10-tap Finite Impulse-Response (FIR) filter per main
data channel, with 8 bit coefficients, identical for all main
channels
10-tap FIR filter for the AUX channel
Analog and digital eye outputs
Interrupt line triggered by internal auxiliary envelope
processing e.g. label, counter, and others
Robust programmable digital PLL clock extraction unit
Low power SLEEP mode
Slew rate limited Electromagnetic Compatibility (EMC)
friendly output
Digital Compact Cassette (DCC) optimized error
correction
Programmable symbol synchronization strategy for tape
input data
Microcontroller control of capstan servo possible during
playback and recording
Frequency and phase regulation of capstan servo
during playback
Choice of Dynamic Random Access Memory (DRAM)
and Static Random Access Memory (SRAM) types for
system Random Access Memory (RAM)
Scratch pad RAM for microcontroller in system RAM
Integrated interface for Precision Adaptive Sub-band
Coding (PASC) data bus
Three wire microcontroller ‘L3’ interface
Protection against invalid auxiliary data
Seamless joins between recordings.
GENERAL DESCRIPTION
The SAA2023 performs the drive processor function in the
DCC system. This function is built up of digital equalizer,
error correction and tape formatting functions. The digital
equalizer is intended for use with DCC read amplifiers
TDA1318 or TDA1380. The tape formatting and error
correction circuit is intended for use with PASC ICs
SAA2003 and SAA2013, and write amplifiers TDA1319 or
TDA1381.
ORDERING INFORMATION
Note
1.
When using reflow soldering it is recommended that the Dry Packing instructions in the “Quality Reference
Pocketbook”are followed. The pocketbook can be ordered using the code 9398 510 34011.
TYPE NUMBER
PACKAGE
PINS
PIN POSITION
TQFP80
(1)
QFP80
(1)
MATERIAL
CODE
SAA2023H
SAA2023GP
80
80
plastic
plastic
SOT315-1
SOT318-2
相關PDF資料 |
PDF描述 |
|---|---|
| SAA2023H | RES 4.53K OHM 1/16W 0.5% 0402SMD |
| SAA2500 | MPEG Audio Source Decoder |
| SAA2500H | MPEG Audio Source Decoder |
| SAA2501 | Digital Audio Broadcast DAB decoder |
| SAA2501H | Digital Audio Broadcast DAB decoder |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SAA2023GP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Drive processor for DCC systems |
| SAA2023H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Drive processor for DCC systems |
| SAA2032 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital equalization for the tape drive processing of the DCC system |
| SAA2032GP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital equalization for the tape drive processing of the DCC system |
| SAA-21 | 制造商:GENERAL DEVICES 功能描述:CHASSIS SUPPORT ANGLES, Sold in a Set of 2 |
發(fā)布緊急采購，3分鐘左右您將得到回復。