參數(shù)資料
型號: S71WS512NE0BFWZZ0
廠商: SPANSION LLC
元件分類: 存儲器
英文描述: Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt
中文描述: SPECIALTY MEMORY CIRCUIT, PBGA96
封裝: 9 X 12 MM, LEAD FREE, FBGA-96
文件頁數(shù): 90/142頁
文件大小: 1996K
代理商: S71WS512NE0BFWZZ0
90
S29WSxxxN MirrorBit Flash Family For Multi-chip Products (MCP)
S71WS512NE0BFWZZ_00_ A1 June 28, 2004
A d v a n c e I n f o r m a t i o n
Notes:
1. The timings are similar to synchronous read timings.
2. VA = Valid Address. Two read cycles are required to determine status. When the Embedded Algorithm
operation is complete, the toggle bits will stop toggling.
3. RDY is active with data (DQ8 = 0 in the Configuration Register). When DQ8 = 1 in the Configuration Register,
RDY is active one clock cycle before data.
Figure 26. Synchronous Data Polling Timings/Toggle Bit Timings
Note:
DQ2 toggles only when read at an address within an erase-suspended sector. The system may use OE# or CE#
to toggle DQ2 and DQ6
Figure 27. DQ2 vs. DQ6
CE#
CLK
AVD#
Addresses
OE#
Data
RDY
Status Data
Status Data
VA
VA
tIACC
tIACC
Enter
Erase
Erase
Resume
Erase
Enter Erase
Suspend Program
Erase Suspend
Read
Erase Suspend
Read
Erase
Suspend
Program
WE#
DQ6
DQ2
Erase
Complete
Erase
Suspend
Embedded
Erasing
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