- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄365460 > S71WS512NC0BFWE72 (Spansion Inc.) Stacked Multi-Chip Product (MCP) PDF資料下載
參數(shù)資料
| 型號(hào)： | S71WS512NC0BFWE72 |
| 廠商： | Spansion Inc. |
| 英文描述： | Stacked Multi-Chip Product (MCP) |
| 中文描述： | 堆疊式多芯片產(chǎn)品（MCP） |
| 文件頁(yè)數(shù)： | 95/188頁(yè) |
| 文件大?。?/td> | 2252K |
| 代理商： | S71WS512NC0BFWE72 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)當(dāng)前第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)
September 15, 2005 S71WS-N_01_A4
S71WS-Nx0 Based MCPs
93
A d v a n c e I n f o r m a t i o n
Table 15.2 Sector Protection Commands
Command Sequence
( Notes)
Command Set Entry (5)
Program (6, 12)
Read (6)
Command Set Exit (7)
Command Set Entry (5)
Program [0-3] (8)
Read (
9
)
Unlock
Command Set Exit (7)
Command Set Entry (5)
PPB Program (10)
All PPB Erase (10, 11)
PPB Status Read
Command Set Exit (7)
Global
Volatile Sector
Protection
Freeze
(PPB Lock)
Command Set Exit (7)
Command Set Entry (5)
DYB Set
DYB Clear
DYB Status Read
Command Set Exit (7)
C
Bus Cycles ( Notes 1–4)
Third
Addr
Data
555
40
First
Second
Fourth
Addr
Fifth
Sixth
Seventh
Addr
Addr
555
XX
77
XX
555
XX
0...00
00
XX
555
XX
XX
SA
XX
555
XX
BA
XX
555
XX
XX
SA
XX
Data
AA
A0
data
90
AA
A0
PWD0
25
90
AA
A0
80
RD(0)
90
AA
A0
RD(0)
90
AA
A0
A0
RD(0)
90
Addr
2AA
77/00
Data
55
data
Data
Addr
Data
Addr
Data
Data
Lock
Register
Bits
3
2
1
2
3
2
4
7
2
3
2
2
1
2
3
2
1
2
3
2
2
1
2
XX
2AA
00
0...01
00
XX
2AA
SA
00
00
55
Password
Protection
555
60
PWD[0-3]
PWD1
03
00
55
00
30
0...02
00
PWD2
PWD0
0...03
01
PWD3
PWD1
02
PWD2
03
PWD3
00
29
Non-Volatile
Sector
Protection (PPB)
[BA]555
C0
XX
2AA
XX
00
55
00
Command Set Entry (5)
PPB Lock Bit Set
PPB Lock Bit Status Read
[BA]555
50
XX
2AA
SA
SA
00
55
00
01
Volatile Sector
Protection
(DYB)
[BA]555
E0
XX
00
Legend:
X = Don’t care.
RA = Address of the memory location to be read.
PD(0) = Secured Silicon Sector Lock Bit. PD(0), or bit[0].
PD(1) = Persistent Protection Mode Lock Bit. PD(1), or bit[1], must
be set to ‘0’ for protection while PD(2), bit[2] must be left as ‘1’.
PD(2) = Password Protection Mode Lock Bit. PD(2), or bit[2], must
be set to ‘0’ for protection while PD(1), bit[1] must be left as ‘1’.
PD(3) = Protection Mode OTP Bit. PD(3) or bit[3].
SA = Sector Address. WS256N = A23–A14; WS128N = A22–A14.
Notes:
1.
All values are in hexadecimal.
2.
Shaded cells indicate read cycles.
3.
Address and data bits not specified in table, legend, or notes are
don’t cares (each hex digit implies 4 bits of data).
4.
Writing incorrect address and data values or writing them in the
improper sequence may place the device in an unknown state.
The system must write the reset command to return the device
to reading array data.
5.
Entry commands are required to enter a specific mode to enable
instructions only available within that mode.
6.
If both the Persistent Protection Mode Locking Bit and the
Password Protection Mode Locking Bit are set at the same time,
the command operation aborts and returns the device to the
default Persistent Sector Protection Mode during 2nd bus cycle.
Note that on all future devices, addresses equal 00h, but is
currently 77h for the WS256N only. See Tables
11.1
and
11.2
for
explanation of lock bits.
7.
Exit command must be issued to reset the device into read
mode; device may otherwise be placed in an unknown state.
BA = Bank Address. WS256N = A23–A20; WS128N = A22–A20.
PWD3–PWD0 = Password Data. PD3–PD0 present four 16 bit
combinations that represent the 64-bit Password
PWA = Password Address. Address bits A1 and A0 are used to select
each 16-bit portion of the 64-bit entity.
PWD = Password Data.
RD(0), RD(1), RD(2) = DQ0, DQ1, or DQ2 protection indicator bit. If
protected, DQ0, DQ1, or DQ2 = 0. If unprotected, DQ0, DQ1,
DQ2 = 1.
8.
Entire two bus-cycle sequence must be entered for each portion
of the password.
Full address range is required for reading password.
10. See
Figure 11.2
for details.
11. “All PPB Erase” command pre-programs all PPBs before erasure
to prevent over-erasure.
12. The second cycle address for the lock register program operation
is 77 for S29WS256N; however, for WS128N this address is 00.
9.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S71WS512NC0BFWE73 | Stacked Multi-Chip Product (MCP) |
| S71WS512NC0BFWY20 | Stacked Multi-Chip Product (MCP) |
| S71WS512NC0BFWY22 | Stacked Multi-Chip Product (MCP) |
| S71WS512NC0BFWY23 | Stacked Multi-Chip Product (MCP) |
| S71WS512NC0BFWY30 | Stacked Multi-Chip Product (MCP) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S71WS512NC0BFWE73 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
| S71WS512NC0BFWEJ0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
| S71WS512NC0BFWEJ2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
| S71WS512NC0BFWEJ3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
| S71WS512NC0BFWEK0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。