參數資料
型號: S71PL129JC0BFW9Z2
廠商: SPANSION LLC
元件分類: 存儲器
英文描述: Stacked Multi-Chip Product (MCP) Flash Memory
中文描述: SPECIALTY MEMORY CIRCUIT, PBGA64
封裝: 8 X 11.60 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-64
文件頁數: 113/153頁
文件大?。?/td> 3651K
代理商: S71PL129JC0BFW9Z2
60
S71PL129JC0/S71PL129JB0/S71PL129JA0
S71PL129Jxx_00_A8 October 28, 2005
Advance
Info rmation
DQ2: Toggle Bit II
The “Toggle Bit II” on DQ2, when used with DQ6, indicates whether a particular
sector is actively erasing (that is, the Embedded Erase algorithm is in progress),
or whether that sector is erase-suspended. Toggle Bit II is valid after the rising
edge of the final WE# pulse in the command sequence.
DQ2 toggles when the system reads at addresses within those sectors that have
been selected for erasure. (The system may use either OE# or CE1# / CE2# to
control the read cycles.) But DQ2 cannot distinguish whether the sector is actively
erasing or is erase-suspended. DQ6, by comparison, indicates whether the device
is actively erasing, or is in Erase Suspend, but cannot distinguish which sectors
are selected for erasure. Thus, both status bits are required for sector and mode
information. See Table 14 to compare outputs for DQ2 and DQ6.
Figure 7 shows the toggle bit algorithm in flowchart form, and the “DQ2: Toggle
Bit II” explains the algorithm. See also “DQ6: Toggle Bit I.” Figure 19 shows the
toggle bit timing diagram. Figure 20 shows the differences between DQ2 and DQ6
in graphical form.
Reading Toggle Bits DQ6/DQ2
Refer to Figure 7 for the following discussion. Whenever the system initially be-
gins reading toggle bit status, it must read DQ7–DQ0 at least twice in a row to
determine whether a toggle bit is toggling. Typically, the system would note and
Note: The system should recheck the toggle bit even if DQ5 = “1” because the toggle
bit may stop toggling as DQ5 changes to “1.” See “DQ6: Toggle Bit I” and “DQ2: Tog-
gle Bit II” for more information.
Figure 7. Toggle Bit Algorithm
START
No
Yes
DQ5 = 1?
No
Yes
Toggle Bit
= Toggle?
No
Program/Erase
Operation Not
Complete, Write
Reset Command
Program/Erase
Operation Complete
Toggle Bit
= Toggle?
Read Byte Twice
(DQ7–DQ0)
Address = VA
Read Byte
(DQ7–DQ0)
Address =VA
Read Byte
(DQ7–DQ0)
Address =VA
相關PDF資料
PDF描述
S71PL129NC0HFW4U3 SPECIALTY MEMORY CIRCUIT, PBGA64
S71PL191HB0BFI100 SPECIALTY MEMORY CIRCUIT, PBGA73
S71VS128RC0ZHK203 SPECIALTY MEMORY CIRCUIT, PBGA56
S71VS128RC0ZHK2L2 SPECIALTY MEMORY CIRCUIT, PBGA56
S71WS512ND0BAWEH SPECIALTY MEMORY CIRCUIT, PBGA84
相關代理商/技術參數
參數描述
S71PL129JC0BFW9Z3 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory
S71PL129N 制造商:SPANSION 制造商全稱:SPANSION 功能描述:256/128/128兆位(16/8/8米x16位元)的CMOS 3.0電壓只有同時讀/寫,頁面模式閃存
S71PL129NB0 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit MCPs
S71PL129NB0HAW5B0 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit MCPs
S71PL129NB0HAW5B2 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit MCPs