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參數(shù)資料
| 型號： | S5T8701 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | FLEX ROAMING DECODER II |
| 中文描述： | FleX創(chuàng)建漫游解碼器二 |
| 文件頁數(shù)： | 16/70頁 |
| 文件大?。?/td> | 506K |
| 代理商： | S5T8701 |
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FLEX
TM
ROAMING DECODER II
S5T8701
16
OFD:
Oscillator Frequency Difference. These bits describe the maximum difference in the frequency of
the 76.8kHz oscillator crystal with respect to the frequency of the transmitter. These limits should be
the worst case difference in frequency due to all conditions including but not limited to aging,
temperature, and manufacturing tolerance. Using a smaller frequency difference in this packet will
result in lower power consumption due to higher receiver battery save ratios. Note that this value is
not the absolute error of the oscillator frequency provided to the S5T8701. The absolute error of the
clock used by the FLEX transmitter must be taken into account. (e.g. If the transmitter tolerance is
±
25ppm and the 76.8kHz oscillator tolerance is
±
140ppm, the oscillator frequency difference is
±
65ppm and OFD should be set to 0.)(value after reset=0)
OFD1
0
0
1
1
OFD0
0
1
0
1
Frequency Difference
±
300ppm
±
150ppm
±
75ppm
±
0ppm
PCE:
Partial Correlation Enable. When this bit is set, partial correlation of addresses is enabled. When
partial correlation is enabled, the S5T8701 will shutdown the receiver before the end of the last
FLEX block which contains addresses if it can determine that none of the addresses in that FLEX
block will match any enabled address in the S5T8701. When this bit is cleared, the receiver will be
controlled as it was in previous versions of the IC.(value after reset=0)
SP:
Signal Polarity. These bits set the polarity of
EXTS1
and
EXTS0
input signals. (value after reset=0)
The polarity of the
EXTS0
and
EXTS1
bits will be determined by the receiver design.
SP
1
SP
0
Signal Polarity EXTS1
EXTS0
Normal
Normal
Inverted
Inverted
FSK Modulation
@SP = 0, 0
+4800Hz
+1600Hz
-1600Hz
-4800Hz
EXTS1
EXTS0
0
0
1
1
0
1
0
1
Normal
Inverted
Normal
Inverted
1
1
0
0
0
1
1
0
SME:
Synchronous Mode Enable. When this bit is set, a Status Packet will be automatically sent
whenever the SMU (synchronous mode update) bit in the Status Packet is set. The host can use the
SM (synchronous mode) bit in the Status Packet as an in-range/out-of-range indication.
(value after reset=0)
MOT:
Maximum Off Time. This bit has no effect if AST in the Timing Control Packet is non-zero. When
AST=0 and MOT=0, asynchronous A-word searches will time-out in 4 minutes. When AST=0 and
MOT=1, asynchronous A-word searches will time-out in 1 minute. (value after reset=0)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S5T8702 | FEEX ALPHANUMERIC DECODER II |
| S5T8702X01-E0R0 | FEEX ALPHANUMERIC DECODER II |
| S5T8803A01-D0B0 | DIODE ZENER SINGLE 500mW 30Vz 4.2mA-Izt 0.05 0.1uA-Ir 23 SOD-123 3K/REEL |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S5T8701X01-E0R0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:FLEX ROAMING DECODER II |
| S5T8702 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:FEEX ALPHANUMERIC DECODER II |
| S5T8702X01-E0R0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:FEEX ALPHANUMERIC DECODER II |
| S5T8803A | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:10 CH PLL |
| S5T8803A01-D0B0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:10 CH PLL |
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