參數(shù)資料
型號(hào): S5H1420
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: Channel Decoder for DVB-S/DSS
中文描述: 頻道解碼器DVB-S/DSS
文件頁(yè)數(shù): 17/31頁(yè)
文件大小: 849K
代理商: S5H1420
S5H1420
DBS Channel Decoder for DVB-S/DSS
-17
ID control register
(Address: 0x00)
Addr. RegName
Signal name
Width Property Description
0x00
ID01
(0x03)
S5H1420_ID
[7:0]
R
Revision ID
System control registers
(Address: 0x01-0x02)
Addr. RegName
Signal name
Width Property Description
[4]
R/W
Set to “0”
System soft reset mode (active high)
SOFT_RST
[3]
R/W
[1] Enable [0] Disable
[2]
R/W
Set to “0”
[1]
R/W
Set to “0”
DSS/DVB mode selection
0x01
CON_0
(0x00)
DSS_ DVB
[0]
R/W
[1] DSS [0] DVB
[6]
R/W
Set to “0”
[5]
R/W
Set to “0”
SER_SEL
[4]
R/W
Set to “1”
[3]
R/W
Set to “0”
[2]
R/W
Set to “0”
Power down mode
[1] Power down enable
PWR_DN
[1]
R/W
[0] Power down disable
I2C repeater control
[1] I2C repeater enable,
[0] I2C repeater disable.
Note: The master should be set this bit to “1” in order to interface
with the tuner.
0x02
CON_1
(0x00)
I2C_RPT
[0]
R/W
When the master is not communicated with the tuner, this bit
should be set to “0”
PLL control registers
(Address: 0x03-0x04)
Addr. RegName Signal name
Width Property Description
PLL programming information
0x03
PLL01
(0x50)
M
[7:0]
R/W
F
out
=
((
M+8
)
F
in
)/((
P+2
2
s
)
P
[5:0]
R/W
F
in
=
4 MHz
0x04
PLL02
(0x40)
S
[7:6]
R/W
Samsung Electronics Co, Ltd. Proprietary Information
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