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參數資料
| 型號： | S5935QRC |
| 廠商： | APPLIEDMICRO INC |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI Product |
| 中文描述： | PCI BUS CONTROLLER, PQFP160 |
| 封裝： | GREEN, PLASTIC, QFP-160 |
| 文件頁數： | 152/204頁 |
| 文件大?。?/td> | 1897K |
| 代理商： | S5935QRC |
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S5935 – PCI Product
152 DS1527
AMCC Confidential and Proprietary
Revision 1.02 – June 27, 2006
Data Book
stores the PCI address in the Pass-Thru Address Reg-
ister (APTA).
For Pass-Thru writes, the S5935 responds immedi-
ately (asserting TRDY#) and transfers the data from
the PCI bus into the Pass-Thru Data Register (APTD).
The S5935 then indicates to the Add-On interface that
a Pass-Thru write is taking place and waits for Add-On
logic to read the APTD register and complete the
transfer (assert PTRDY#). Once the S5935 has cap-
tured the data from the PCI bus, the transfer is finished
from the PCI bus perspective, and the PCI bus
becomes available for other transfers.
For Pass-Thru reads, the S5935 indicates to the Add-
On interface that a Pass-Thru read is taking place and
waits for Add-On logic to write the Pass-Thru Data
Register and complete the transfer (assert PTRDY#).
The S5935 completes the cycle when data is written
into the data register. If the Add-On cannot complete
the write quickly enough, the S5935 requests a retry
from the initiator. See target-requested disconnect
information.
PCI Pass-Thru Burst Accesses
For PCI Pass-Thru burst accesses, the S5935 cap-
tures the PCI address and determines if it falls into one
of the defined Pass-Thru regions. Accesses that fall
into a Pass-Thru region are accepted by asserting
DEVSEL#. The S5935 monitors FRAME# and IRDY#
on the PCI bus to identify burst accesses. If the PCI
initiator is performing a burst access, the Pass-Thru
status indicators notify Add-On logic.
For Pass-Thru burst writes, the S5935 responds
immediately (asserting TRDY#). The S5935 transfers
the first data phase of the burst into the Pass-Thru
Data Register (APTD), and stores the PCI address in
the Pass-Thru Address Register (APTA). The Add-On
interface completes the transfer and asserts PTRDY#.
Every time PTRDY# is asserted by the Add-On, the
S5935 begins the next data phase. The next data
phase is latched into the data register. For burst
accesses, APTA is automatically incremented by the
S5935 for each data phase.
For Pass-Thru burst reads, the S5935 claims the PCI
cycle (asserting DEVSEL#). The request for data is
passed on to Add-On logic and the PCI address is
stored in the APTA register. The Add-On interface
completes the transfer and asserts PTRDY#. The
S5935 then drives the requested data on the PCI bus
and asserts TRDY# to begin the next data phase. The
APTA register is automatically incremented by the
S5935 for each data phase.
PCI Retry Conditions
In some applications, Add-On logic may not be able to
respond to Pass-Thru accesses quickly. In this situa-
tion, the S5935 disconnects from the PCI bus,
signaling a retry. This indicates that the initiator should
try the access again at a later time. This allows other
PCI cycles to be run while the logic on the slow target
completes the Pass-Thru access. Ideally, when the ini-
tiator retries the access, the target has completed the
access and can respond to the initiator.
With many devices, particularly memories, the first
access takes longer than subsequent accesses
(assuming they are sequential and not random). For
this reason, the PCI specification allows 16 clocks to
respond to the first data phase of a PCI cycle and 8
clocks for subsequent data phases (in the case of a
burst) before a retry must be requested by the S5935.
The S5935 also requests a retry if an initiator attempts
to burst past the end of a Pass-Thru region. The
S5935 updates the Pass-Thru Address Register
(APTA) for each data phase during bursts, and if the
updated address is not within the current Pass-Thru
region, a retry is requested.
For example, a PCI system may map a 512 byte Pass-
Thru memory region to 0DC000h to 0DC1FFh. A PCI
initiator attempts a four DWORD burst with a starting
address of 0DC1F8h. The first and second data
phases complete (filling the DWORDs at 0DC1F8h
and 0DC1FCh), but the third data phase causes the
S5935 to request a retry. This forces the initiator to
present the address 0DC200h on the PCI bus. If this
address is part of another S5935 Pass-Thru region,
the device accepts the access.
PCI Write Retries
When the S5935 requests a retry for a PCI Pass-Thru
write, it indicates that the Add-On is still completing a
previous Pass-Thru write access. The Pass-Thru
Address and Data Register contents (APTA and
APTD) are still required for the previous Pass-Thru
operation and cannot be updated by the PCI interface
until the access completes (the Add-On asserts
PTRDY#).
When the Add-On is busy completing a Pass-Thru
write, the S5935 requests an immediate retry for all
Pass-Thru region accesses, allowing the PCI bus to
perform other operations. PCI Operation Registers
may be accessed while the Add-On is still completing
a Pass-Thru access. Only Pass-Thru region accesses
receive retry requests.
相關PDF資料 |
PDF描述 |
|---|---|
| S5935TFC | PCI Product |
| S5935TF | PCI 5V Bus Master/Target Device 32-bit |
| S5935 | PCI 5V Bus Master/Target Device 32-bit |
| S5935QF | PCI 5V Bus Master/Target Device 32-bit |
| S5990-01 | POSITION SENSITIVE DETECTOR |
相關代理商/技術參數 |
參數描述 |
|---|---|
| S5935TF | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PCI 5V Bus Master/Target Device 32-bit |
| S5935TFC | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PCI Product |
| S593T | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:MOSMIC for TV-Tuner Prestage with 5 V Supply Voltage |
| S593T_08 | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:MOSMIC? for TV-Tuner Prestage with 5 V Supply Voltage |
| S593TR | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:MOSMIC? for TV-Tuner Prestage with 5 V Supply Voltage |
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