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參數(shù)資料
| 型號： | S29GL064A10BAIW12 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 4M X 16 FLASH 3V PROM, 100 ns, PBGA64 |
| 封裝： | FBGA-64 |
| 文件頁數(shù)： | 64/97頁 |
| 文件大小： | 3490K |
| 代理商： | S29GL064A10BAIW12 |
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January 11, 2006 S29GL-A_00_A5
S29GL-A MirrorBit Flash Family
65
Pr el im i n a r y
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm
is in progress or complete, or whether the device entered the Erase Suspend
mode. Toggle Bit I may be read at any address, and is valid after the rising edge
of the final WE# pulse in the command sequence (prior to the program or erase
operation), and during the sector erase time-out.
During an Embedded Program or Erase algorithm operation, successive read cy-
cles to any address cause DQ6 to toggle. The system may use either OE# or CE#
to control the read cycles. When the operation is complete, DQ6 stops toggling.
After an erase command sequence is written, if all sectors selected for erasing
are protected, DQ6 toggles for approximately 100 s, then returns to reading
array data. If not all selected sectors are protected, the Embedded Erase algo-
rithm erases the unprotected sectors, and ignores the selected sectors that are
protected.
The system can use DQ6 and DQ2 together to determine whether a sector is ac-
tively erasing or is erase-suspended. When the device is actively erasing (that
is, the Embedded Erase algorithm is in progress), DQ6 toggles. When the device
enters the Erase Suspend mode, DQ6 stops toggling. However, the system must
also use DQ2 to determine which sectors are erasing or erase-suspended. Alter-
natively, the system can use DQ7 (see the subsection on DQ7: Data# Polling on
If a program address falls within a protected sector, DQ6 toggles for approxi-
mately 1 s after the program command sequence is written, then returns to
reading array data.
DQ6 also toggles during the erase-suspend-program mode, and stops toggling
once the Embedded Program algorithm is complete.
Table 32 on page 68 shows the outputs for Toggle Bit I on DQ6. Figure 8, on page
66 shows the toggle bit algorithm. Figure 20, on page 81 shows the toggle bit
timing diagrams. Figure 21, on page 81 shows the differences between DQ2 and
DQ6 in graphical form. See also the subsection on DQ2: Toggle Bit II on page 67.
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