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參數(shù)資料
| 型號(hào)： | S29GL064A10BAIW12 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 4M X 16 FLASH 3V PROM, 100 ns, PBGA64 |
| 封裝： | FBGA-64 |
| 文件頁(yè)數(shù)： | 63/97頁(yè) |
| 文件大?。?/td> | 3490K |
| 代理商： | S29GL064A10BAIW12 |
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64
S29GL-A MirrorBit Flash Family
S29GL-A_00_A5 January 11, 2006
Prel imi n ary
Notes:
1. VA = Valid address for programming. During a sector erase operation, a valid address is any sector
address within the sector being erased. During chip erase, a valid address is any non-protected
sector address.
2. DQ7 should be rechecked even if DQ5 = 1 because DQ7 may change simultaneously with DQ5.
Figure 7. Data# Polling Algorithm
RY/BY#: Ready/Busy#
The RY/BY# is a dedicated, open-drain output pin which indicates whether an
Embedded Algorithm is in progress or complete. The RY/BY# status is valid after
the rising edge of the final WE# pulse in the command sequence. Since RY/BY#
is an open-drain output, several RY/BY# pins can be tied together in parallel with
a pull-up resistor to VCC.
If the output is low (Busy), the device is actively erasing or programming. (This
includes programming in the Erase Suspend mode.) If the output is high
(Ready), the device is in the read mode, the standby mode, or in the erase-sus-
pend-read mode. Table 32 on page 68 shows the outputs for RY/BY#.
DQ7 = Data?
Yes
No
DQ5 = 1?
No
Yes
FAIL
PASS
Read DQ15–DQ0
Addr = VA
Read DQ15–DQ0
Addr = VA
DQ7 = Data?
START
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