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參數(shù)資料
| 型號： | S2061 |
| 廠商： | Applied Micro Circuits Corp. |
| 英文描述： | Serial Backplane Transceiver(用于高速串行數(shù)據(jù)傳送的收發(fā)器) |
| 中文描述： | 串行背板收發(fā)器（用于高速串行數(shù)據(jù)傳送的收發(fā)器） |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 142K |
| 代理商： | S2061 |
2
SERIAL BACKPLANE TRANSCEIVER
S2061
February 2, 1999 / Revision C
Figure 2. Functional Block Diagram
TXTESTN
TX [0:7]
TK [0,1]
FRAME
KGEN
10
8
2
PLL CLOCK
MULTIPLIER
F0 = F1 X 10
SHIFT
REGISTER
TXP
TXN
D
Input
Latch
Q
PLL CLOCK
RECOVERY
2:1
D
8
D
BITCLK
Q
COM_DET
DETECT
LOGIC
CONTROL
LOGIC
RXP
RXN
TBC
TP
TN
EWRAP
EN_CDET
RX[0:7]
KFLAG
BYTERR
RK[0,1]
FP
RBC1
RBC0
SHIFT
REGISTER
8B10B
Encoder
WORDCLK
LOCKDET
10
8B10B
Decoder
8
SDTTL
SDPECL
S2061 OVERVIEW
The S2061 transceiver performs encoding/decoding
parallel-to-serial and serial-to-parallel conversion and
framing functions to implement a Serial Backplane
interface. Operation of the S2061 chip is straightfor-
ward, as depicted in Figure 2. The sequence of
operations is as follows:
Transmitter
1. 8-bit parallel input
2. 8B/10B encoding
3. Parallel-to-serial conversion
4. Serial output
Receiver
1. Clock and data recovery from serial input
2. Serial-to-parallel conversion
3. Frame detection
4. 10B/8B decoding
5. 8-bit parallel output
Internal clocking and control functions are transparent
to the user. Details of data timing can be seen in Figures
6, 7, 8.
A lock detect feature is provided for the receive PLL.
The LOCKDET output indicates that the PLL is locked
to the data stream.
Loopback Modes
Local loopback mode is supported by the chip. Local
loopback provides capability for performing offline test-
ing of the interface to ensure the integrity of the serial
channel before enabling the transmission medium. It
also allows for system diagnostics. (See the section
Other Operating Modes.)
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| S2062 | Dual Serial Backplane Transceiver(用于以太網(wǎng)，光纖通道高速串行數(shù)據(jù)傳送的雙收發(fā)器) |
| S2064 | Quad Serial Backplane Device(用于以太網(wǎng)，光纖通道高速串行數(shù)據(jù)傳送的四收發(fā)器) |
| S2065 | Quad Serial Backplane Device with Dual I/O(帶雙傳送接收串行I/O的四收發(fā)器) |
| S2066 | Quad GigaBit Ethernet Transceiver(四千兆位以太網(wǎng)收發(fā)器) |
| S2067 | Dual Serial Backplane Transceiver with Dual I/O(帶雙傳送接收串行I/O的雙收發(fā)器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S2061F | 制造商:PRX 功能描述:Silicon Controlled Rectifier, 50 Volt, 2.75A, TO-220 |
| S2061Y | 制造商:RCA 功能描述:Silicon Controlled Rectifier, 30 Volt, 2.75A, TO-220 |
| S2062TB | 制造商:AppliedMicro 功能描述:Backplane Transceiver 156-Pin TBGA |
| S2065A | 制造商:AppliedMicro 功能描述:Backplane Transceiver 208-Pin TBGA |
| S2065J | 功能描述:SCR 65A 200V RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube |
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