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參數(shù)資料
| 型號： | S-4544A |
| 廠商： | Seiko Instruments Inc. |
| 英文描述： | LCD Controller-Driver With Built-in 8-Bit and Serial Interfaces(內置8位和串行接口的LCD控制器-驅動器) |
| 中文描述： | LCD控制器與- 8內置驅動器位和串行接口（內置8位和串行接口的液晶顯示控制器-驅動器） |
| 文件頁數(shù)： | 28/39頁 |
| 文件大?。?/td> | 237K |
| 代理商： | S-4544A |
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LCD Controller-Driver
S-4544A
Seiko Instruments Inc.
27
19. Power Save
When setting display all-OFF with the display OFF command and executing the display all-lit ON command, it
changes to the Power save mode. When displaying in all-lit state and executing the Display OFF command, it is also
changed to Power save mode. In Power save mode, CR oscillation stops and current consumption is reduced and
has a value near that at standstill.
The oscillating circuit and LCD power supply circuit are stopped.
The LCD drive circuit is stopped. The Segment and Common outputs are fixed at VDD level.
The LC display goes out.
The contents of the display data RAM, the command and the address before the power save mode do not
change.
The Power save state is canceled through the Display ON or the Display all-lit command. To change the state from
the power save to the normal display, input both the Display ON and Display All-Lit OFF commands.
When using an external power supply circuit, stop the the external power supply circuit and float the LCD power
supply. When using an external bias resistor in order to reduce the electric current, attach a switching transistor
which cuts this current flowing through the bias resistor.
20. Reference Voltage Temperature Compensation Coefficient Select
For temperature characteristics, refer to the attached data.
State
Display ON
Display ON
Display OFF
Display OFF
Display All-Lit OFF
Display All-Lit ON
Display All-Lit OFF
Display All-Lit ON
Normal display operation
All-lit display
All-OFF
Power save
A0
RDX
R/WX
D7
D6
D5
D4
D3
D2
D1
0
1
0
1
1
1
0
0
1
*
D0
Temperature Compensation Coefficient
VREF(% /
°
C)
-0.13
+0.01
Reference Voltage (TYP)
VREF(V)
(VDD=OV)
0
1
-1.6
-2.2
Combination of Commands
Selection
Data
* : don
’
t care
D0
|
V
REF
(T
2
)
|
-
|
V
REF
(T
1
)
|
V
REF
=
T
2
> T
1
T
2
- T
1
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