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參數(shù)資料
| 型號： | RLD03N06CLE |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | JFETs |
| 英文描述： | 0.3A, 60V, 6 Ohm, ESD Rated, Current Limited, Voltage Clamped, Logic Level N-Channel Power MOSFETs(0.3A, 60V, 6Ω , ESD 額定,電流限制,電壓箝位,邏輯電平N溝道功率MOS場效應管) |
| 中文描述： | 60 V, 6 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-251AA |
| 文件頁數(shù)： | 6/9頁 |
| 文件大?。?/td> | 93K |
| 代理商： | RLD03N06CLE |
6-423
The results of this equation are plotted in Figure 15 for various
heatsinks.
Duty Cycle Operation
In many applications either the drain to source voltage or the
gate drive is not available 100% of the time. The copper header
on which the RLD03N06CLE, CLESM and RLP03N06CLE is
mounted has a very large thermal storage capability, so for
pulse widths of less then 1ms, the temperature of the header
can be considered a constant, thereby the junction temperature
can be calculated simply as shown in Equation 2:
D
R
θ
CA
Generally the heat storage capability of the silicon chip in a
power transistor is ignored for duty cycle calculations. Making
this assumption, limiting junction temperature to 175
o
C and
using the T
C
calculated in Equation 2, the expression for ma-
ximum V
DS
under duty cycle operation is shown in Equation 3
=
:
These values are plotted as Figures 16 through 21 for vari-
ous heatsink thermal resistances.
Limited Time Operations
Protection for a limited period of time is sufficient for many
applications. As stated above the heat storage in the silicon
chip can usually be ignored for computations of over 10 ms,
thereby the thermal equivalent circuit reduces to a simple
enough circuit to allow easy computation on the limiting
conditions. The variation in limiting current with temperature
complicates the calculation of junction temperature, but a
simple straight line approximation of the variation is accurate
enough to allow meaningful computations. The curves shown
as Figures 22 through 25 (RLP03N06CLE) and Figure 26
through 29 (RLD03N06CLE and RLD03N06CLESM) give an
accurate indication of how long the specified voltage can be
applied to the device in the current limiting mode without
exceeding the maximum specified 175
o
C junction temperature.
In practice this tells you how long you have to alleviate the
condition causing the current limiting to occur.
TC
VDS
ID
(
)
TAMBIENT
+
=
(EQ.2)
VDS
150o
ILM
T
C
R
θ
JC
–
D
(EQ.3)
Typical Performance Curves
90
NOTE: Heat Sink Thermal Resistance = HSTR.
FIGURE 15. DC OPERATION IN CURRENT LIMITING
FIGURE 16. MAXIMUM V
DS
vs AMBIENT TEMPERATURE IN
CURRENT LIMITING. (HEATSINK THERMAL
RESISTANCE = 1
o
C/W)
FIGURE 17. MAXIMUM V
DS
vs AMBIENT TEMPERATURE IN
CURRENT LIMITING. (HSTR = 2
o
C/W)
FIGURE 18. MAXIMUM V
DS
vs AMBIENT TEMPERATURE IN
CURRENT LIMITING. (HSTR = 5
o
C/W)
HSTR = 0
o
C/W
HSTR = 1
o
C/W
HSTR = 2
o
C/W
HSTR = 10
o
C/W
HSTR = 25
o
C/W
HSTR = 80
o
C/W
T
J
= 175
o
C
I
LIM
= 0.210A
R
θ
JC
= 5.0
C/W
75
60
45
30
15
025
50
75
100
125
150
175
T
A
, AMBIENT TEMPERATURE (
o
C)
D
,
HSTR = 5
o
C/W
DC = 2%
DC = 5%
DC = 10%
DC = 20%
DC = 50%
90
75
60
45
30
15
0
100
125
150
175
T
A
, AMBIENT TEMPERATURE (
o
C)
D
,
T
J
= 175
o
C
I
LIM
= 0.210A
R
θ
JC
= 5.0
C/W
DUTY CYCLE = DC MAX PULSE WIDTH = 100ms
DC = 2%
DC = 5%
DC = 10%
DC = 20%
DC = 50%
90
75
60
45
30
15
0
100
125
150
175
T
A
, AMBIENT TEMPERATURE (
o
C)
D
,
T
J
= 175
o
C
I
LIM
= 0.210A
R
θ
JC
= 5.0
C/W
DUTY CYCLE = DC MAX PULSE WIDTH = 100ms
DC = 2%
DC = 5%
DC = 10%
DC = 20%
DC = 50%
90
75
60
45
30
15
0
75
100
T
A
, AMBIENT TEMPERATURE (
o
C)
125
150
175
D
,
T
J
= 175
o
C
I
LIM
= 0.210A
R
θ
JC
= 5.0
o
C/W
DUTY CYCLE = DC MAX PULSE WIDTH = 100ms
RLD03N06CLE, RLD03N06CLESM, RLP03N06CLE
相關PDF資料 |
PDF描述 |
|---|---|
| RLD03N06CLESM | 0.3A, 60V, 6 Ohm, ESD Rated, Current Limited, Voltage Clamped, Logic Level N-Channel Power MOSFETs(0.3A, 60V, 6Ω , ESD 額定,電流限制,電壓箝位,邏輯電平N溝道功率MOS場效應管) |
| RLP03N06CLE | 0.3A, 60V, ESD Rated, Current Limited, Voltage Clamped Logic Level N-Channel Enhancement-Mode Power MOSFETs |
| RLD03N06CLE | 0.3A, 60V, ESD Rated, Current Limited, Voltage Clamped Logic Level N-Channel Enhancement-Mode Power MOSFETs |
| RLD03N06CLESM | 0.3A, 60V, ESD Rated, Current Limited, Voltage Clamped Logic Level N-Channel Enhancement-Mode Power MOSFETs |
| RLP1N06CLE | 1A, 55V, 0.750 Ohm,Voltage Clamping,Current Limited, N-Channel Power MOSFET(1A, 55V, 0.750 Ω,電壓箝位,電流限定,N溝道功率MOS場效應管) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| RLD03N06CLESM | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| RLD03N06CLESM9A | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| RLD06P075B | 制造商:LITTELFUSE 制造商全稱:Littelfuse 功能描述:This new radial leaded products are designed specifi cally for Universal Serial Bus (USB |
| RLD06P075BA | 功能描述:可復位保險絲 - RoHS:否 制造商:Bourns 電流額定值: 電阻:7.5 Ohms 最大直流電壓: 保持電流:0.1 A 安裝風格:SMD/SMT 端接類型:SMD/SMT 跳閘電流:0.6 A 引線間隔: 系列:MF-PSHT 工作溫度范圍:- 40 C to + 125 C |
| RLD06P075BF | 功能描述:可復位保險絲 6V .75A RoHS:否 制造商:Bourns 電流額定值: 電阻:7.5 Ohms 最大直流電壓: 保持電流:0.1 A 安裝風格:SMD/SMT 端接類型:SMD/SMT 跳閘電流:0.6 A 引線間隔: 系列:MF-PSHT 工作溫度范圍:- 40 C to + 125 C |
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