參數(shù)資料
型號： RK80530KZ017512
英文描述： MICROPROCESSOR|32-BIT|CMOS|PGA|370PIN|CERAMIC
中文描述： 微處理器| 32位|的CMOS |美巡賽| 370PIN |陶瓷
文件頁數(shù)： 28/86頁
文件大?。?/td> 882K
代理商： RK80530KZ017512
28
Datasheet
Intel
Pentium
III Processor with 512KB L2 Cache at 1.13GHz to 1.40GHz
NOTES:
1. Unless otherwise noted, all specifications in this table apply to Intel Pentium III processors with 512KB L2
cache at all frequencies.
2. All inputs, outputs, and I/O pins must comply with the signal quality specifications in
Section 3.0
.
3. Minimum and maximum V
TT
are given in
Table 13 on page 29
.
4. (0
≤
V
IN
≤
1.25 V +3%) and (0
≤
V
OUT
≤
1.25V+3%).
5. Refer to the processor I/O Buffer Models for I/V characteristics.
6. Steady state input voltage must not be above V
SS
+ 1.65V or below V
TT
- 1.65V.
7. Does not apply to Vcc leakage current due to the presence of on die RTT.
NOTES:
1. Unless otherwise noted, all specifications in this table apply to Intel Pentium III processors with 512KB L2
cache at all frequencies.
2. Parameter measured at 9 mA (for use with TTL inputs).
3. (0
≤
V
IN
≤
1.8V +10%).
4. (0
≤
V
OUT
≤
1.8V +10%).
5. For BCLK specifications, refer to
Table 23 on page 42
.
6. (0
≤
V
IN
≤
1.5V +10%).
7. (0
≤
V
OUT
≤
1.5V +10%).
8. Applies to non-AGTL signal PWRGOOD.
9. Applies to non-AGTL signal PICCLK.
10.Applies to non-AGTL signals
except
BCLK, PICCLK, and PWRGOOD.
11.Applies to non-AGTL signal VTT_PWRGD.
12.Vcmos_ref = 2/3 Vcc_cmos1.5, refer to
Table 7 on page 25
.
13.Applies to PICD[1:0].
Table 10. AGTL Signal Group Levels Specifications
1
Symbol
Parameter
Min
Max
Unit
Notes
V
IL
Input Low Voltage
V
REF
- 0.200
V
6
V
IH
Input High Voltage
V
REF
+ 0.200
V
2, 3, 6
Ron
Buffer On Resistance
16.67
5
I
L
Leakage Current for inputs,
outputs, and I/O
±100
μA
4, 7
Table 11. Non-AGTL Signal Group Levels Specifications
1
Symbol
Parameter
Min
Max
Unit
Notes
V
IL
1.2
V
IL
1.5
V
IL
1.8
V
IL
2.0
V
IH
1.2
Input Low Voltage
0.4
V
11
Input Low Voltage
–0.150
Vcmos_ref - 0.300
V
10
Input Low Voltage
-0.36
0.36
V
8
Input Low Voltage
-0.40
0.40
V
9
Input High Voltage
1.08
V
11
V
IH
1.5
Input High Voltage
Vcmos_ref +
0.250
V
CC_CMOS1.5
+
V
6, 10, 12
V
IH
1.5PICD
Input High Voltage PICD[1:0]
Vcmos_ref +
0.200
2.0
V
12, 13
V
IH
1.8
V
IH
2.0
R
on
Input High Voltage
1.44
2.16
V
8
Input High Voltage
1.60
V
9
30
2
V
OL
Output Low Voltage
0.30
V
7, 9, All
outputs are
open-drain
I
OL
Output Low Current
10
mA
I
LI
Input Leakage Current
±100
μA
3, 6
I
LO
Output Leakage Current
±100
μA
3, 4, 6, 7
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