參數(shù)資料
型號： RD-19240FG-A00
廠商： DATA DEVICE CORP
元件分類： 位置變換器
英文描述： SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, PQFP52
封裝： 10 X 10 MM, ROHS COMPLIANT, PLASTIC, MQFP-52
文件頁數(shù)： 2/19頁
文件大小： 432K
代理商： RD-19240FG-A00
10
Data Device Corporation
www.ddc-web.com
RD-19240
F-02/09-0
LVDT (LINEAR VARIABLE DIFFERENTIAL
TRANSFORMER) MODE
As shown in TABLE 1 the RD-19240 unit can be made to operate
as a LVDT-to-digital converter by connecting Resolution Control
inputs A and B to “0”, “1”, or the -5 volt supply. In this mode the
RD-19240 functions as a ratiometric tracking linear converter.
When linear AC inputs are applied from an LVDT the converter
operates over one quarter of its range. This results in two less bits
of resolution for LVDT mode than are provided in resolver mode.
The LVDT output signals will need to be scaled to be compatible
with the converter input. FIGURE 10 is a schematic of an input
scaling circuit applicable to 3-wire LVDTs. The value of the scaling
constant “a” is selected to provide an input of 2 Vrms at full stroke
of the LVDT. The value of scaling constant “b” is selected to provide
an input of 1 Vrms at null of the LVDT. Suggested components for
implementing the input scaling circuit are a quad op-amp with an
input offset of less than 1.0 mV, and precision thin-film resistors of
0.1% tolerance. FIGURE 11 illustrates a 2-wire LVDT configura-
tion.
Data output of the RD-19240 is Binary Coded in LVDT mode. The
most negative stroke of the LVDT is represented by ALL ZEROS
and the most positive stroke of the LVDT is represented by ALL
ONES. The most significant 2 bits (2 MSBs) may be used as
overrange indicators. Positive overrange is indicated by code “01”
and negative overrange is indicated by code “11” (see TABLE 6).
+S
-S
SIN
aR
R
+C
-C
COS
R'
-
+
-
+
R/2
R
aR
bR
2R'
R'
bR
+REF
-REF
R'
R
VB
VA
Notes:
1. R'
≥ 10 kΩ
2. Consideration for the value of R is LVDT loading.
3. RMS values given.
4. Use the absolute values of VA and VB when subtracting per the formula for calculating resistance
values. Use the calculated sign of VA and VB for calculating SIN and COS. Calculations
shown are based on full scale travel being to the VA side of the LVDT.
5. See the RDC-19220 & RD-19230 Applications Manual for calculation examples.
6. Negative voltages are 180 out of phase from the reference.
Fs = 2V
-2V
VB
VA
LVDT
OUTPUT
+FS
-FS
NULL
COS
SIN
RDC-19240
INPUT
-FS
+FS
NULL
1V
2V
1
b =
=
VAnull
VBnull
2
a =
(VA - VB) max
a
SIN = - 1+
(VA - VB)
2
a
COS = - 1-
(VA - VB)
2
FIGURE 10. 3-WIRE LVDT SCALING CIRCUIT
TABLE 6. 12-BIT LVDT OUTPUT CODE
FOR FIGURE 10
LVDT OUTPUT
OVER
RANGE
DATA
MSB
LSB
+ over full travel
+ full travel -1 LSB
+0.5 travel
+1 LSB
null
- 1 LSB
-0.5 travel
- full travel
- over full travel
01
xxxx
00
1111
00
1100
0000
00
1000
0000
0001
00
1000
0000
00
0111
1111
00
0100
0000
00
0000
11
xxxx
TABLE 7. LVDT MODE ACCURACY SPECIFICATIONS
LVDT RESOLUTION
UNIT
ACCURACY
FREQUENCY
Accuracy (LVDT mode)
12-bit resolution
10-bit resolution
8-bit resolution
Hz
%
Tested at 5k
3.1 (+1 LSB of full scale)
1.2 (+1 LSB of full scale)
0.49 (+1 LSB of full scale)
+S
-S
SIN
aR
R
+C
-C
COS
R
-
+
-
+
R
aR
C1
bR
2R
R
bR
+REF
-REF
R
C2
2 WIRE LVDT
REF IN
R
2 V
FS = 2 V
FIGURE 11. 2-WIRE LVDT DIRECT INPUT
C1 = C2, set for phase lag = phase lead through the LVDT.
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