- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄230917 > RD-19240FG-A00 (DATA DEVICE CORP) SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, PQFP52 PDF資料下載
參數(shù)資料
| 型號(hào)： | RD-19240FG-A00 |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 位置變換器 |
| 英文描述： | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, PQFP52 |
| 封裝： | 10 X 10 MM, ROHS COMPLIANT, PLASTIC, MQFP-52 |
| 文件頁(yè)數(shù)： | 17/19頁(yè) |
| 文件大?。?/td> | 432K |
| 代理商： | RD-19240FG-A00 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)當(dāng)前第17頁(yè)第18頁(yè)第19頁(yè)
7
Data Device Corporation
www.ddc-web.com
RD-19240
F-0209-0
DC INPUTS
As noted in TABLE 1 the RD-19240 accepts DC inputs. DC oper-
ation is from either 0° to 180° or 180° to 359°, due to the possibil-
ity of an unstable false null, i.e., 180° hangup condition. This unsta-
ble condition is corrected once the input angle is changed. In real
world applications, an instantaneous 180° change is impossible,
therefore the converter will always be correct within 360°.
If, however, a system is powered up at exactly 180° from the
applied input, the output angle may not respond. Although theo-
retically possible, this condition is highly unlikely in real world appli-
cations and is most often encountered during wraparound verifi-
cation tests, simulations and troubleshooting.
When using DC inputs, take into account the following considerations:
1. Disable the synthesized reference option by connecting pin
DSR to ground through a 10 ohm resistor.
2. Set the reference signal to DC by tying RH to +5 V and RL to
ground or -5 V.
3. Set the SIN and COS inputs such that the maximum signal
equals 1.8 VDC. To verify that the maximum signal is at the
proper voltage, monitor the SIN input at 90° and adjust the
reference voltage so that SIN equals 1.8 VDC. This will ensure
that the bandwidth hysteresis is consistent with AC operation.
4. BIT output is undertermined during DC operation and should
not be used.
5. Converter accuracy and differential linearity may degrade from
the rated accuracy when using a DC input, due to DC offsets.
In the best case scenario, the input is single ended and there
are no additional offsets present.
2
1
-VCO
VEL
+5 V
-5 V
100 k
Ω
(OFFSET)
100 RV
0.8 RV
0.4 R (SCALING)
V
RD-19240
FIGURE 6. VELOCITY TRIMMING
VELOCITY TRIMMING
RD-19240 specifications for velocity scaling, reversal error, and
offset are contained in TABLE 1. Velocity scaling and offset are
externally trimmable for applications requiring tighter specifications
than those available from the standard unit. FIGURE 6 shows the
setup for trimming these parameters with external potentiometers.
It should also be noted that when the resolution is changed, veloc-
ity scaling is also changed. Since the VEL output is from an inte-
grator with capacitor feedback, the VEL voltage cannot change
instantaneously. Therefore, when changing resolution while mov-
ing, there will be a transient with a magnitude proportional to the
velocity with a duration determined by the converter bandwidth.
OPTIONAL BANDWIDTH COMPONENTS
The RD-19240 provides the option of using a second set of
bandwidth components. The second set of components can be
used for switch-on-the-fly or dual-bandwidth applications. The
SHIFT and UP/DN inputs are used when switching bandwidth
components, and their operation is described below. Refer to the
block diagram, FIGURE 1.
SHIFT
The SHIFT pin is an input that chooses between the VEL1 and
VEL2 bandwidth components. This pin has an internal pull-up to
+5 V. When the SHIFT pin is left open, or a logic 1 is applied, the
VEL1 components are selected. When a logic 0 is applied, the
VEL2 components are selected. The deselected set of band-
width components are driven by an amplifier, with programma-
ble gain, that follows the velocity amplifier. This amplifier can be
used to pre-charge the deselected set of components to the
voltage level that is expected after a change in resolution. (See
description on BENEFIT OF SWITCHING RESOLUTION ON
THE FLY.)
UP/DN
The UP/DN input selects the gain of the amplifier driving the de-
selected set of bandwidth components. UP/DN has three input
states. See TABLE 5 to relate input to gain.
TABLE 5. PRECHARGE AMPLIFIER
GAIN PROGRAMMING
UP/DN
Logic 0
4
Logic 1
1/4
-5 V
1
GAIN
Preset Resolution to Increase
Preset Resolution to Decrease
Dual Bandwidth
FUNCTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| RD-14597F1-514K | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CDFP36 |
| RD-14597F1-554W | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CDFP36 |
| RD-14597F1-572Z | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CDFP36 |
| RD-14597F1-592K | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CDFP36 |
| RD-14597F1-594Y | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CDFP36 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| RD1-9320 | 制造商:STMicroelectronics 功能描述:MPU DEMO-BOARD |
| RD1950MPXM2010GS | 制造商:Freescale Semiconductor 功能描述:WATER LEVEL REFERENCE DESIGN - Bulk |
| RD1986MMA2260D | 功能描述:加速傳感器開(kāi)發(fā)工具 TRIAX REF DSGN 3-AXIS FOR MMA2260D RoHS:否 制造商:Murata 工具用于評(píng)估:SCA3100-D04 加速:2 g 傳感軸:Triple Axis 接口類型:SPI 工作電壓:3.3 V |
| RD1986MMA6260Q | 功能描述:加速傳感器開(kāi)發(fā)工具 TRIAX REF DSGN 3-AXIS FOR NMA6260Q RoHS:否 制造商:Murata 工具用于評(píng)估:SCA3100-D04 加速:2 g 傳感軸:Triple Axis 接口類型:SPI 工作電壓:3.3 V |
| RD1A-12S | 制造商:World Products 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。