- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄69313 > R5F3650NNFB MICROCONTROLLER, PQFP100 PDF資料下載
參數(shù)資料
| 型號： | R5F3650NNFB |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 0.50 MM PITCH, LQFP-100 |
| 文件頁數(shù)： | 25/81頁 |
| 文件大?。?/td> | 879K |
| 代理商： | R5F3650NNFB |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁當(dāng)前第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁
43
4317K–AVR–03/2013
AT90PWM2/3/2B/3B
Notes:
1. Only recommended with external crystal or resonator selected as clock source.
2. Only level interrupt.
8.6
Power Reduction Register
The Power Reduction Register, PRR, provides a method to stop the clock to individual peripher-
als to reduce power consumption. The current state of the peripheral is frozen and the I/O
registers can not be read or written. Resources used by the peripheral when stopping the clock
will remain occupied, hence the peripheral should in most cases be disabled before stopping the
clock. Waking up a module, which is done by clearing the bit in PRR, puts the module in the
same state as before shutdown.
A full predictible behaviour of a peripheral is not guaranteed during and after a cycle of stopping
and starting of its clock. So its recommended to stop a peripheral before stopping its clock with
PRR register.
Module shutdown can be used in Idle mode and Active mode to significantly reduce the overall
power consumption. In all other sleep modes, the clock is already stopped.
8.6.1
Power Reduction Register - PRR
Note:
PRPSC1 is not used on AT90PWM2/2B
Bit 7 - PRPSC2: Power Reduction PSC2
Writing a logic one to this bit reduces the consumption of the PSC2 by stopping the clock to this
module. When waking up the PSC2 again, the PSC2 should be re initialized to ensure proper
operation.
Table 8-2.
Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Active Clock Domains
Oscillator
s
Wake-up Sources
Sleep
Mode
clk
CPU
clk
FLASH
clk
IO
clk
ADC
clk
PLL
Ma
in
Clo
c
k
Sour
ce
Enab
led
INT
3
..
0
PSC
SPM/E
EPR
OM
Rea
d
y
ADC
WD
T
Ot
herI/
O
Idle
XXX
X
ADC
Noise
Reduction
XX
X
X(2)
XX
X
Power-
down
X(2)
XX
Standby(1)
XX(2)
X
Bit
7
6
543
2
1
0
PRPSC2
PRPSC1(
PRPSC0
PRTIM1
PRTIM0
PRSPI
PRUSART
PRADC
PRR
Read/Write
R/W
Initial Value
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| R5F36B3ENNP | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQCC64 |
| R5F36CAKNFA | 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP100 |
| R5F36CAKNFB | 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP100 |
| R5F36CA6DFA | 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP100 |
| R5F36CA6DFB | 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| R5F3650RDFA | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU |
| R5F3650RDFB | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU |
| R5F3650RNFA | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU |
| R5F3650RNFB | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:This MCU consumes low power, and supports operating modes |
| R5F3650TDFA | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。