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參數(shù)資料
| 型號： | R5F2L387CDFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80 |
| 文件頁數(shù)： | 32/74頁 |
| 文件大小： | 959K |
| 代理商： | R5F2L387CDFP |
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39
2588F–AVR–06/2013
ATtiny261/461/861
able Register 1” on page 162 for details.
7.4
Register Description
7.4.1
MCUCR – MCU Control Register
The MCU Control Register contains control bits for power management.
Bit 5 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
Bits 4, 3 – SM1:0: Sleep Mode Select Bits 2:0
These bits select between the three available sleep modes as shown in Table 7-2.
Bit 2 – Res: Reserved Bit
This bit is reserved and will always read zero.
7.4.2
PRR – Power Reduction Register
The Power Reduction Register provides a method to reduce power consumption by allowing
peripheral clock signals to be disabled.
Bits 7, 6, 5, 4 – Res: Reserved Bits
These bits are reserved and will always read zero.
Bit 3 – PRTIM1: Power Reduction Timer/Counter1
Writing a logic one to this bit shuts down the Timer/Counter1 module. When the Timer/Counter1
is enabled, operation will continue like before the shutdown.
Bit
7654
3
2
10
–
PUD
SE
SM1
SM0
—
ISC01
ISC00
MCUCR
Read/Write
R
R/W
R
R/W
Initial Value
0000
0
00
Table 7-2.
Sleep Mode Select
SM1
SM0
Sleep Mode
00
Idle
0
1
ADC Noise Reduction
1
0
Power-down
1
Standby
Bit
7
6
543
2
1
0
–
-
PRTIM1
PRTIM0
PRUSI
PRADC
PRR
Read/Write
RR
RRR/W
R/W
Initial Value
0
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