
R8C/2C Group, R8C/2D Group
6. Voltage Detection Circuit
Rev.2.00
Dec 05, 2007
REJ09B0339-0200
Figure 6.8
VW2C Register
Voltage Monitor 2 Circuit Control Register (1)
Symbol
Address
After Reset(8)
VW2C
0037h
00h
Bit Symbol
Bit Name
Function
RW
NOTES:
1.
2.
3.
4.
5.
6.
7.
8.
9. When the VW2C6 bit is set to 1 (voltage monitor 2 reset mode), set the VW2C7 bit to 1 (w hen VCC reaches Vdet2
or below ). (Do not set to 0.)
Set the PRC3 bit in the PRCR register to 1 (w rite enable) before w riting to the VW2C register.
To use the voltage monitor 2 interrupt to exit stop mode and to return again, w rite 0 to the VW2C1
bit before w riting 1.
The VW2C2 bit is enabled w hen the VCA27 bit in the VCA2 register is set to 1 (voltage detection 2 circuit
enabled).
Set this bit to 0 by a program. When 0 is w ritten by a program, it is set to 0 (and remains unchanged even if 1 is
w ritten to it).
The VW2C6 bit is enabled w hen the VW2C0 bit is set to 1 (voltage monitor 2 interrupt/enables reset).
The VW2C0 bit is enabled w hen the VCA27 bit in the VCA2 register is set to 1 (voltage detection 2 circuit
enabled). Set the VW2C0 bit to 0 (disable) w hen the VCA27 bit is set to 0 (voltage detection 2 circuit disabled).
The VW2C7 bit is enabled w hen the VW2C1 bit is set to 1 (digital filter disabled mode).
Bits VW2C2 and VW2C3 remain unchanged after a softw are reset, w atchdog timer reset, voltage monitor 1 reset,
or voltage monitor 2 reset.
VW2C7
Voltage monitor 2 interrupt/reset
generation condition select bit(7, 9)
0 : When VCC reaches Vdet2 or above
1 : When VCC reaches Vdet2 or below
RW
VW2C6
Voltage monitor 2 circuit mode
select bit(5)
0 : Voltage monitor 2 interrupt mode
1 : Voltage monitor 2 reset mode
RW
VW2C3
WDT detection flag(4, 8)
VW2F1
RW
Sampling clock select bits
b5 b4
0 0 : fOCO-S divided by 1
0 1 : fOCO-S divided by 2
1 0 : fOCO-S divided by 4
1 1 : fOCO-S divided by 8
VW2F0
RW
0 : Not detected
1 : Detected
RW
0 : Digital filter enabled mode
(digital filter circuit enabled)
1 : Digital filter disabled mode
(digital filter circuit disabled)
RW
VW2C2
Voltage change detection
flag(3, 4, 8)
VW2C1
Voltage monitor 2 digital filter
disable mode select bit(2)
VW2C0
RW
Voltage monitor 2 interrupt/reset
enable bit(6)
0 : Disable
1 : Enable
b7 b6 b5 b4 b3 b2
0 : Not detected
1 : VCC has crossed Vdet2
RW
b1 b0