
R8C/2C Group, R8C/2D Group
10. Clock Generation Circuit
Rev.2.00
Dec 05, 2007
REJ09B0339-0200
10.6
Oscillation Stop Detection Function
The oscillation stop detection function detects the stop of the XIN clock oscillating circuit. The oscillation stop
detection function can be enabled and disabled by the OCD0 bit in the OCD register.
When the XIN clock is the CPU clock source and bits OCD1 to OCD0 are set to 11b, the system is placed in the
following state if the XIN clock stops.
OCD2 bit in OCD register = 1 (on-chip oscillator clock selected)
OCD3 bit in OCD register = 1 (XIN clock stops)
CM14 bit in CM1 register = 0 (low-speed on-chip oscillator oscillates)
Oscillation stop detection interrupt request is generated.
10.6.1
How to Use Oscillation Stop Detection Function
The oscillation stop detection interrupt shares a vector with the voltage monitor 1 interrupt, the voltage
monitor 2 interrupt, and the watchdog timer interrupt. When using the oscillation stop detection interrupt
and watchdog timer interrupt, the interrupt source needs to be determined.
When the XIN clock restarts after oscillation stop, switch the XIN clock to the clock source of the CPU
clock and peripheral functions by a program.
To enter wait mode while using the oscillation stop detection function, set the CM02 bit to 0 (peripheral
function clock does not stop in wait mode).
Since the oscillation stop detection function is a function for cases where the XIN clock is stopped by an
external cause, set bits OCD1 to OCD0 to 00b when the XIN clock stops or is started by a program, (stop
mode is selected or the CM05 bit is changed).
This function cannot be used when the XIN clock frequency is 2 MHz or below. In this case, set bits OCD1
to OCD0 to 00b.
To use the low-speed on-chip oscillator clock for the CPU clock and clock sources of peripheral functions
after detecting the oscillation stop, set the FRA01 bit in the FRA0 register to 0 (low-speed on-chip
oscillator selected) and bits OCD1 to OCD0 to 11b.
To use the high-speed on-chip oscillator clock for the CPU clock and clock sources of peripheral functions
after detecting the oscillation stop, set the FRA00 bit to 1 (high-speed on-chip oscillator on) and the FRA01
bit to 1 (high-speed on-chip oscillator selected) and then set bits OCD1 to OCD0 to 11b.
Table 10.5
Specifications of Oscillation Stop Detection Function
Item
Specification
Oscillation stop detection clock and
frequency bandwidth
f(XIN)
≥ 2 MHz
Enabled condition for oscillation stop
detection function
Set bits OCD1 to OCD0 to 11b
Operation at oscillation stop detection
Oscillation stop detection interrupt is generated