
Rev. 1.00 Mar. 18, 2008 Page xvii of xxiv
14.3.5 Serial Mode Register (SMR) ................................................................................ 366
14.3.6 Serial Control Register (SCR) .............................................................................. 370
14.3.7 Serial Status Register (SSR) ................................................................................. 373
14.3.8 Smart Card Mode Register (SCMR)..................................................................... 377
14.3.9 Bit Rate Register (BRR) ....................................................................................... 378
14.4
Operation in Asynchronous Mode ..................................................................................... 384
14.4.1 Data Transfer Format............................................................................................ 385
14.4.2 Receive Data Sampling Timing and Reception Margin
in Asynchronous Mode......................................................................................... 386
14.4.3 Clock..................................................................................................................... 387
14.4.4 SCI Initialization (Asynchronous Mode) .............................................................. 388
14.4.5 Serial Data Transmission (Asynchronous Mode) ................................................. 389
14.4.6 Serial Data Reception (Asynchronous Mode) ...................................................... 391
14.5
Multiprocessor Communication Function.......................................................................... 395
14.5.1 Multiprocessor Serial Data Transmission ............................................................. 397
14.5.2 Multiprocessor Serial Data Reception .................................................................. 398
14.6
Operation in Clocked Synchronous Mode ......................................................................... 401
14.6.1 Clock..................................................................................................................... 401
14.6.2 SCI Initialization (Clocked Synchronous Mode).................................................. 402
14.6.3 Serial Data Transmission (Clocked Synchronous Mode) ..................................... 403
14.6.4 Serial Data Reception (Clocked Synchronous Mode) .......................................... 405
14.6.5 Simultaneous Serial Data Transmission and Reception
(Clocked Synchronous Mode) .............................................................................. 407
14.7
Smart Card Interface Description ...................................................................................... 409
14.7.1 Sample Connection ............................................................................................... 409
14.7.2 Data Format (Except in Block Transfer Mode) .................................................... 410
14.7.3 Block Transfer Mode ............................................................................................ 411
14.7.4 Receive Data Sampling Timing and Reception Margin ....................................... 412
14.7.5 Initialization.......................................................................................................... 413
14.7.6 Serial Data Transmission (Except in Block Transfer Mode) ................................ 413
14.7.7 Serial Data Reception (Except in Block Transfer Mode) ..................................... 417
14.7.8 Clock Output Control............................................................................................ 419
14.8
Interrupt Sources................................................................................................................ 421
14.8.1 Interrupts in Normal Serial Communication Interface Mode ............................... 421
14.8.2 Interrupts in Smart Card Interface Mode .............................................................. 422
14.9
Usage Notes ....................................................................................................................... 423
14.9.1 Module Stop Mode Setting ................................................................................... 423
14.9.2 Break Detection and Processing ........................................................................... 423
14.9.3 Mark State and Break Sending ............................................................................. 423