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參數(shù)資料
| 型號： | PXAC37KFA |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-bit microcontroller family(16位微控制器系列) |
| 中文描述： | 16-BIT, OTPROM, 32 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 50/68頁 |
| 文件大?。?/td> | 344K |
| 代理商： | PXAC37KFA |
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Philips Semiconductors
Preliminary specification
XA-C3
XA 16-bit microcontroller family
32K/1024 OTP CAN transport layer controller
1 UART, 1 SPI Port, CAN 2.0B, 32 CAN ID filters, transport layer co-processor
2000 Jan 25
43
The Frame Info byte contains the following bits:
FRAME INFO
7
IDE
6
5
4
3
2
1
0
RTR
SEM1
SEM0
DLC.3
DLC.2
DLC.1
DLC.0
The actual incoming Screener ID which caused the Match can be
retrieved from the MnMIDH and MnMIDL registers as shown in
Figure 39.
MNMIDH
15
ID.28
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ID.27
ID.26
ID.25
ID.24
ID.23
ID.22
ID.21
ID.20
ID.19
ID.18
ID.17
ID.16
ID.15
ID.14
ID.13
MNMIDL
15
ID.12
14
13
12
ID.9
11
ID.8
10
ID.7
9
8
7
6
5
4
3
2
1
–
0
–
ID.11
ID.10
ID.6
ID.5
ID.4
ID.3
ID.2
ID.1
ID.0
IDE
Figure 39. Retrieving the Screener ID for an Extended CAN Frame
Fragmented Message Assembly
Masking of the 11/29 bit CAN Identifier field by User software (but
only the actualbits of the Identifier itself!) is disallowed for any
Message Object which employs auto–Fragmentation assembly. The
identifier which resulted in the Match is, therefore, known
unambiguously and is not included in the receive buffer. If the
software needs access to this information, it can retrieve it from the
appropriate MnMIDH and MnMIDL registers.
As subsequent frames of a Fragmented message are received, the
new data bytes are appended to the end of the previously received
packets. This process continues until a complete multi–frame
message has been received and stored.
If an object is enabled with FRAG = 1, under protocols DeviceNet,
CANopen, and OSEK (Prtcl1 Prtcl0
≠
00), the first CAN frame data
byte is used to encode Fragmentation information only. That byte
will not be stored in the buffer area. The storage will start with the
second data byte (Data Byte 2) and proceed to the end of the frame.
See Figure 40.
Byte count
Data Byte 2
Data Byte 3
…
Data Byte DLC
Data Byte 2 (next)
Data Byte 3 (next)
…
Direction of increasing
address
Figure 40. Memory Image for Fragmented CTL Messages
(FRAG = 1 and Prtcl1 Prtcl0
≠
00)
If an object is enabled with FRAG = 1, with CAN as the system
protocol (Prtcl1 Prtcl0 = 00), then CAN frames are stored
sequentially in that object’s message buffer using the format shown
in . Also, if [Prtcl1 Prtcl0] = 00, Rx Buffer Full is defined as “l(fā)ess than
9 bytes remaining” after storage of a complete CAN frame. When
the DMA pointer wraps around, it will be reset to offset ‘1’ in the
buffer, not offset ‘0’, and there will be no Byte Count written.
FrameInfo
Data Byte 1
Data Byte 2
…
Data Byte DLC
FrameInfo (next)
Data Byte 1 (next)
Data Byte 2 (next)
…
Direction of increasing
address
dd
Direction of increasing
Figure 41. Memory Image for CAN Frame Buffering (FRAG = 1
and Prtcl1 Prtcl0
=
00)
During buffer access, the DMA will generate addresses
automatically starting from the base location of the buffer. If the DMA
has reached the top of the buffer, but the message has not been
completely transferred to memory yet, the DMA will wrap around by
generating addresses starting from the bottom of the buffer again.
Some time before this happens, a warning interrupt will be
generated so that the User application can take the necessary
action to prevent data loss.
The top location of the buffer is determined by the size of the buffer
as specified in MnBSZ.
The XA-C3 automatically receives, checks and reassembles up to
32 Fragmented messages automatically. When the FRAG bit is set
on a particular message, the message handler hardware will use the
Fragmentation information contained in Data Byte 1 of each frame.
To enable automatic Fragmented message handling for a certain
Message Object, the User is responsible for setting the FRAG bit in
the object’s MnCTL register.
The message handler will keep track of the current address location
and the number of bytes of each CTL message as it is being
assembled in the designated message buffer location. After an “End
of Message” is decoded, the message handler will finish moving the
complete message and the byte count into the message buffer via
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| PXAC37KFA/00,512 | 功能描述:IC XA MCU 16BIT 32K OTP 44-PLCC RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:XA 標(biāo)準(zhǔn)包裝:250 系列:56F8xxx 核心處理器:56800E 芯體尺寸:16-位 速度:60MHz 連通性:CAN，SCI，SPI 外圍設(shè)備:POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):21 程序存儲器容量:40KB（20K x 16） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:6K x 16 電壓 - 電源 (Vcc/Vdd):2.25 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 6x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:48-LQFP 包裝:托盤 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323 |
| PXAC37KFBD | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:XA 16-bit microcontroller family 32K/1024 OTP CAN transport layer controller 1 UART, 1 SPI Port, CAN 2.0B, 32 CAN ID Filters, transport layer co-proce |
| PXAC37KFBD/00,157 | 功能描述:8位微控制器 -MCU 16B MCU 32K/1024 1 UART RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PXAG30KBA | 功能描述:16位微控制器 - MCU XA 16BIT 512R/2UART ROMLESS RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| PXAG30KBA,512 | 功能描述:16位微控制器 - MCU XA 16BIT 512R/2UART RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
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