參數(shù)資料
型號(hào)： PXAC37KFA
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 16-bit microcontroller family(16位微控制器系列)
中文描述： 16-BIT, OTPROM, 32 MHz, MICROCONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 47/68頁
文件大小： 344K
代理商： PXAC37KFA
Philips Semiconductors
Preliminary specification
XA-C3
XA 16-bit microcontroller family
32K/1024 OTP CAN transport layer controller
1 UART, 1 SPI Port, CAN 2.0B, 32 CAN ID filters, transport layer co-processor
2000 Jan 25
40
OBJECT N MATCH ID FIELD (MNMIDH AND MNMIDL)
Mid28 – Mid18
Mid17 – Mid10
Mid9 – Mid2
Mid1
Mid0
MIDE
OBJECT N MASK FIELD (MNMSKH AND MNMSKL)
Msk28 – Msk18
Msk17 – Msk10
Msk9 – Msk2
Msk1
Msk0
SCREENER ID FIELD (ASSEMBLED FROM INCOMING BIT–STREAM)
CAN ID.28 – CAN ID.18
Data Byte 1 [7:0]
Data Byte 2 [7: 0]
x
x
IDE
NOTE:
1. For a Standard CAN Frame Message Object, only 27 bits plus IDE (11 bits of CAN ID + 2x8 bits + IDE ) from the incoming message are
routed to the acceptance filter. The User is therefore required to set the Msk1 and Msk0 bits in the Mask field for that object (i.e., “don’t
care”). The IDE bit is not Maskable.
In many applications based on Standard CAN frames, either Data
Byte 1, Data Byte 2, or both do not participate in Acceptance
Filtering. Therefore, the User is required to Mask out the unused
Data Byte(s).
Screener ID Field for Extended CAN Frame
The following table shows how the Screener ID field is assembled
from the incoming bits of an Extended CAN Frame, and how it is
compared to the Match ID and Mask fields of Object n.
Note:
The
IDE bit is not Maskable.
OBJECT N MATCH ID FIELD (MNMIDH AND MNMIDL)
Mid28 – Mid18
Mid17 – Mid10
Mid9 – Mid2
Mid1
Mid0
MIDE
OBJECT N MASK FIELD (MNMSKH AND MNMSKL)
Msk28 – Msk18
Msk17 – Msk10
Msk9 – Msk2
Msk1
Msk0
SCREENER ID FIELD (ASSEMBLED FROM INCOMING BIT–STREAM)
CAN ID.28 – CAN ID.0
IDE
MnMIDH: Message n Match ID High Word
Address: MMR base + n0h
Access: Read, write. Word access only.
Reset value: xxxxh
MNMIDH
15
Mid28
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Mid27
Mid26
Mid25
Mid24
Mid23
Mid22
Mid21
Mid20
Mid19
Mid18
Mid17
Mid16
Mid15
Mid14
Mid13
MnMIDL: Message n Match ID Low Word
Address: MMR base + n2h
Access: Read, write. Word access only.
Reset value: xxxxxxxxxxxxxx00b (unused bits are always read as
‘0’)
MNMIDL
15
Mid12
14
13
12
Mid9
11
10
Mid7
9
8
7
6
5
4
3
2
1
–
0
–
Mid11
Mid10
Mid8
Mid6
Mid5
Mid4
Mid3
Mid2
Mid1
Mid0
MIDE
MnMSKH: Message n Mask High Word
Address: MMR base + n4h
Access: Read, write. Word access only.
Reset value: xxxxh
MNMSKH
15
Msk28
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Msk27
Msk26
Msk25
Msk24
Msk23
Msk22
Msk21
Msk20
Msk19
Msk18
Msk17
Msk16
Msk15
Msk14
Msk13
NOTE:
1. Note: For transmit objects, the frame information is programmed in this register.
MnMSKL: Message n Mask Low Word
Address: MMR base + n6h
Access: Read, write. Word access only.
Reset value: xxxxxxxxxxxxx000b (unused bits are always read as
‘0’)
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