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參數資料
| 型號： | PXAC37KFA |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-bit microcontroller family(16位微控制器系列) |
| 中文描述： | 16-BIT, OTPROM, 32 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數： | 42/68頁 |
| 文件大小： | 344K |
| 代理商： | PXAC37KFA |
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Philips Semiconductors
Preliminary specification
XA-C3
XA 16-bit microcontroller family
32K/1024 OTP CAN transport layer controller
1 UART, 1 SPI Port, CAN 2.0B, 32 CAN ID filters, transport layer co-processor
2000 Jan 25
35
XA-C3 OVERVIEW
Introduction
The XA-C3 is a member of the Philips XA (eXtended Architecture)
family of high performance 16–bit single–chip microcontrollers.
Combined in the XA-C3 are an array of standard microcontroller
peripherals, a powerful CAN 2.0A/B controller, and a unique CAN
”Message Management” engine which provides integrated hardware
support for most
CAN T
ransport
L
ayer
(CTL
) protocols.
Integrated into the XA-C3 microcontroller is the CAN Controller Core
from the award–winning
1
Philips SJA1000
C
AN (2.0A/B)
D
ata
L
ink
L
ayer (
CDLL
) device. Since 1986, CAN Users have developed
high–level
CAN
T
ransport
L
ayers. The XA-C3 implements many
such
CTL
concepts in hardware, ncluding automatic assembly of
multi–frame Fragmented messages. In fact, the XA-C3 is the first
chip with hardware
CTL
support. The CAN module embedded in the
XA-C3 provides far greater CAN functionality and power than any
existing CAN product, including the SJA 1000 itself
CTL protocols such as Device Net, CANopen and OSEK deliver
long Messages distributed over many CAN Frames (see Figure 34).
1
C
AN
i
n
A
utomation 1997
This method is called Fragmented (or, in European terminology,
Segmented) messaging. The individual frames, forming a complete
CTL message, are interleaved on the CAN bus together with frames
belonging to other (unrelated) CTL/CAN messages. The XA-C3
transparently re–assembles up to 32 concurrent, interleaved CTL
Messages in hardware as directed by a new, powerful ID Screener
technology with 32 Screeners and 32 DMA channels. An on–chip,
512–byte, CTL/CAN Message Buffer RAM provides single–chip
storage for Receive and Transmit. This Buffer RAM is easily
extended (off–chip) to accommodate up to 32 messages of 256
bytes each.
The XA-C3 provides these powerful CAN 2.0A/B and
CTL
features
while maintaining
pin and function compatibility
with the present
XA-G3; the new CAN Rx/Tx pins have been assigned to XA-G3
no–connects. Thus, today’s XA-G3 based products can incorporate
CTL
/CAN in new designs. XA-G3 software is preserved while
XA-C3 features immediately upgrade present XA-G3 board layouts
to
CTL
/CAN. Additionally, the FullCAN (CAN) features of the XA-C3
can be used independently of
CTL
.
8–Byte
8–Byte
8–Byte
8–Byte
8–Byte
8–Byte
8–Byte
8–Byte
8–Byte
CTL Message–A
CTL Message–B
CTL Message–C
CTL Message–D
8–Byte
8–Byte
CAN
Data Frame
CAN bus
SU01335
Figure 34. Interleaved CAN Data Frames
Definition of Terms
Standard and Extended CAN Frames
See Figure 35.
Acceptance Filtering
The process a CAN device implements (usually) in hardware to
determine if a CAN frame should be accepted or ignored and, if
accepted, to store that frame in a pre–assigned Message Object.
Message Object
A Receive RAM Buffer of pre–specified size (up to 256 bytes for
CTL messages) and associated with a particular Acceptance Filter
or, a Transmit RAM Buffer which the User preloads with all
necessary data to transmit a complete CAN Data Frame.
CAN Arbitration ID
An 11–bit (Standard CAN 2.0A Frame) or 29–bit (Extended CAN
2.0B Frame) identifierfield placed in the CAN Frame Header. This
ID field is used to arbitrate Frame access to the CAN bus. Also used
in
Acceptance Filtering
for CAN Frame reception and Transmit
Pre–Arbitration.
Screener ID
A 30–bit field extracted from the incoming message which is then
used in
acceptance filtering
. The screener ID includes the
CAN
Arbitration ID
and the IDE bit, and can include up to 2 Data Bytes.
These 30 extracted bits are the information qualified by
Acceptance
Filtering
.
Match ID
A 30–bit field pre–specified by the User to which the incoming
Screener I
D is compared. Individual
Match Id
s for each of the 32
objects are programmed by the User into designated memory
mapped registers.
Mask
A 29–bit field pre–specified by the User which can override (
Mask
) a
Match ID
comparison at any particular bit (or, combination of bits) in
an
Acceptance Filter
. Individual
Mask
s, one for each
Message
Object
, are programmed by the User in designated
MMR
s.
Individual
Mask
patterns assure that singleReceive Objects can
Screen for multiple acknowledged
CTL
/CAN Frames and thus
minimize the numberof Receive Objects that must be dedicated to
such lower priorityFrames. This ability to
Mask
individual
Message
Objects
is an important new
CTL
feature.
CTL
CAN Transport Layer. A generic term for any high–level protocol,
which extends the capabilities of CAN while employing the CAN
physical layer, CAN frame format and, adheres to the CAN
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