參數(shù)資料
型號(hào)： PSD413A2F
英文描述： Field Programmable Microcontroller Peripherals with Flash Memory(可編程邏輯，16K位SRAM,35個(gè)可編程I/O,通用PLD有59個(gè)輸入)
中文描述： 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備與快閃記憶體（可編程邏輯，16K的位的SRAM，35余個(gè)可編程輸入/輸出，通用PLD的有59個(gè)輸入）
文件頁(yè)數(shù)： 83/98頁(yè)
文件大?。?/td> 365K
代理商： PSD413A2F
ADVANCE INFORMATION
6-83
Appendix A
The Operation and Programming Algorithm
Used In the PSD413F Flash Memory
Abstract
This Appendix describes the operation and programming algorithm used in the Flash
memory inside the PSD413F. Portions of this document are copyrighted by AMD.
The Flash memory is a 1 Mbit, 5.0 volt-only memory organized as 128 Kbytes of 8 bits
each. The 1 Mbit of data is divided into 8 sectors of 16 Kbytes for flexible erase capability.
The 8 bits of data will appear on DQ0 – DQ7. (DQ0 – DQ7 are the ADIO0 – ADIO7 pins in
the PSD413F in mux bus configuration, and are the PC0 – PC7 pins in the non-mux bus
configuration.) This device is designed to be programmed in-system with the standard
system 5.0 Volt V
CC
supply. 12.0 Volt V
PP
is not required for program or erase operations.
The device can also be reprogrammed on the WSI MagicPro
III programmer.
The Flash memory is entirely command set compatible with the JEDEC single-power-
supply Flash standard. Commands are written to the command register using standard
microprocessor write timings. Register contents serve as input to an internal state-machine
which controls the erase and programming circuitry. Write cycles also internally latch
addresses and data needed for the programming and erase operations.
The Flash memory is programmed by executing the program command sequence. This will
invoke the Embedded Program
TM
Algorithm which is an internal algorithm that automatically
times the program pulse widths and verifies proper cell margin. Erase is accomplished by
executing the erase command sequence. This will invoke the Embedded Erase Algorithm
which in an internal algorithm that automatically preprograms the array if it is not already
programmed before executing the erase operation. During erase, the device automatically
times the erase pulse widths and verifies proper cell margin.
This device also features a sector erase architecture. This allows for sectors of memory
to be erased and reprogrammed without affecting the data contents of other sectors. A
sector is typically erased and verified within one second. The Flash memory is erased when
shipped from the factory.
The Flash memory also features hardware sector protection. This feature will disable both
program and erase operations in any combination of eight sectors of memory.
The device features single 5.0 Volt power supply operation for both read and write
functions. Internally generated and regulated voltages are provided for the program and
erase operations. A low V
CC
detector automatically inhibits write operations during power
transitions. The end of program or erase is detected by the Data Polling of DQ7 or by the
Toggle Bit (DQ6). Once the end of a program or erase cycle has been completed, the
device automatically resets to the read mode.
The Flash memory electrically erases all bits within a sector simultaneously via
Fowler-Nordheim tunneling. The bytes are programmed one byte at a time using the
EPROM programming mechanism of hot electron injection.
General
Description
Portions of this document are copyrighted by Advanced Micro Devices, Inc.
Reprinted with permission of copyright owner. All rights reserved.
Embedded Program
TM
and Embedded Erase
TM
are trademarks of Advanced Micro Devices, Inc. All rights reserved.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD4-16 制造商:Tamura Corporation of America 功能描述:
PSD4-20 制造商:MICROTRAN 功能描述:POWER TRANSFORMER, 6 VA
PSD4235G2-70U 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 5.0V 4M 70ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD4235G2-90U 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD4235G2-90UI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
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