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參數(shù)資料
| 型號： | PSB3186 |
| 英文描述： | The IRAC1150-D2 Control Board is designed to demonstrate the performance of the IR1150S control IC in a continuous conduction mode boost converter for PFC.; A IRAC1150-D2 with Standard Packaging |
| 中文描述： | 3.3伏ISDN用戶終端訪問控制器eXtended擴(kuò)展 |
| 文件頁數(shù)： | 98/200頁 |
| 文件大?。?/td> | 2959K |
| 代理商： | PSB3186 |
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ISAC-SX TE
PSB 3186
Description of Functional Blocks
Data Sheet
98
2003-01-30
Figure 56
Structure of Last Octet of Ch2 on DD
The Stop/Go bit is available to other layer-2 devices connected to the IOM-2 interface to
determine if they can access the S/T bus D channel.
The access to the D-channel is controlled by a priority mechanism which ensures that all
competing TEs are given a fair access chance. This priority mechanism discriminates
among the kind of information exchanged and information exchange history: Layer-2
frames are transmitted in such a way that signalling information is given priority (priority
class 1) over all other types of information exchange (priority class 2). Furthermore, once
a TE having successfully completed the transmission of a frame, it is assigned a lower
level of priority of that class. The TE is given back its normal level within a priority class
when all TEs have had an opportunity to transmit information at the normal level of that
priority class.
The priority mechanism is based on a rather simple method: A TE not transmitting
layer-2 frames sends binary 1s on the D-channel. As layer-2 frames are delimited by
flags consisting of the binary pattern “01111110” and zero bit insertion is used to prevent
flag imitation, the D-channel may be considered idle if more than seven consecutive 1s
are detected on the D-channel. Hence by monitoring the D echo channel, the TE may
determine if the D-channel is currently used by another TE or not.
A TE may start transmission of a layer-2 frame first when a certain number of
consecutive 1s has been received on the echo channel. This number is fixed to 8 in
priority class 1 and to 10 in priority class 2 for the normal level of priority; for the lower
level of priority the number is increased by 1 in each priority class, i.e. 9 for class 1 and
11 for class 2.
A TE, when in the active condition, is monitoring the D echo channel, counting the
number of consecutive binary 1s. If a 0 bit is detected, the TE restarts counting the
number of consecutive binary 1s. If the required number of 1s according to the actual
level of priority has been detected, the TE may start transmission of an HDLC frame. If
a collision occurs, the TE immediately shall cease transmission, return to the D-channel
monitoring state, and send 1s over the D-channel.
ITD09693
D
CI1
MON1
IC2
IC1
CI0
MON0
B2
B1
MR
MX
MX
MR
S/G A/B
A/B
S/G
Stop/Go
Available/Blocked
DD
E
E
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