- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄368097 > PPC440SPE (Applied Micro Circuits Corp.) PowerPC 440SPe Embedded Processor PDF資料下載
參數(shù)資料
| 型號： | PPC440SPE |
| 廠商： | Applied Micro Circuits Corp. |
| 英文描述： | PowerPC 440SPe Embedded Processor |
| 中文描述： | 嵌入式處理器的PowerPC 440SPe |
| 文件頁數(shù)： | 50/80頁 |
| 文件大小： | 572K |
| 代理商： | PPC440SPE |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁當(dāng)前第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁
PowerPC 440SPe Embedded Processor
50
AMCC Proprietary
Revision 1.23 - Sept 21, 2006
Preliminary Data Sheet
Table 6. Signal Functional Description (Sheet 1 of 8)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3k
Ω
to 3.3V
)
3. Must pull down (recommended value is 1k
Ω
)
4. If not used, must pull up (recommended value is 3k
Ω
to 3.3V)
5. If not used, must pull down (recommended value is 1k
Ω
)
6. Strapping input during reset; pull-up or pull-down required
Signal Name
Description
I/O
Type
Notes
PCI-Express 0:2 Interfaces
PCIE_REFCLK
PCIE_REFCLK
PCI Express Reference Clock: 100 MHz differential
clock pair. Input type is controlled by bit 3 of the
PESDR0_PLLLCT1[MCENT] register.
0 2.5V CMOS or LVDS
1 2.5V LVPECL (recommended)
I
Diff PECL
PCIE0Tx[7:0]
PCIE0Tx[7:0]
PCIE1:2Tx[3:0]
PCIE1:2Tx[3:0]
PCI Express Serial Data Transmit differential signals
LSB is 0.
X8 Mode: All PCIE0Tx[7:0]/PCIE0Tx[7:0] are used.
X4 Mode: Only PCIE0Tx[3:0]/PCIE0Tx[3:0] are used.
O
Diff PECL
PCIE0Rx[7:0]
PCIE0Rx[7:0]
PCIE1:2Rx[3:0]
PCIE1:2Rx[3:0]
PCI Express Serial Data Receive differential signals
LSB is 0.
X8 Mode: All PCIE0Rx[7:0]/PCIE0Rx[7:0] are used.
X4 Mode: Only PCIE0Rx[3:0]/PCIE0Rx[3:0] are used
I
Diff PECL
PCIE0:2AVREG
PCI Express Analog Observation point for internal
voltage regulator
O
PCIECalRP
PCIECalRN
Positive and negative inputs for a 1 Kohm ±1% PCI
Express External calibration resistor
I
PCIEPLLTSTON
Enable PCI Express PLL test modes.
I
PCI-X0 Interfaces
PCIX0Ack64/PCIX0ECC1
Ack64 or ECC1.
Normally used as Ack64 indicating that the target can
transfer data using 64 bits.
or
Used as ECC1 for PCIX mode 2.
I/O
3.3V PCI or
1.5V PCI for
mode 2
4
PCIX0AD63:00
Address/Data bus (bidirectional) for PCI-X0
I/O
3.3V PCI or
1.5V PCI for
mode 2
PCIX0BE7:0
PCI-X Byte Enables for PCI-X0
I/O
3.3V PCI or
1.5V PCI for
mode 2
PCIX0CalG0
PCIX0CalR0
Balls G and R for a 114 Ohm External calibration
resistor. Used to control PCI-X I/O Impedance at 57
Ohm.
I
NA
PCIX0Cap
Capable of PCI-X operation.
This analog input is sampled to configure PCI and
determine the state of the PCIX0VC output signal:
0.00VDD (0.0V) = Conventional PCI & PCIX0VC = 0
0.49VDD (1.0V) = PCI-X DDR 266 Mode 2 &
PCIX0VC = 1
0.75VDD (2.5V) = PCI-X 66 & PCIX0VC = 0
1.00VDD (3.3V) = PCI-X 133 & PCIX0VC = 0
I
NA
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PPC440SPE-3GA533C | PowerPC 440SPe Embedded Processor |
| PPC440SPE-3GA667C | PowerPC 440SPe Embedded Processor |
| PPC440SPE-AGB533C | PowerPC 440SPe Embedded Processor |
| PPC440SPE-AGB667C | PowerPC 440SPe Embedded Processor |
| PPC440SPE-ANB533C | PowerPC 440SPe Embedded Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PPC440SPE-3GA533C | 制造商:AppliedMicro 功能描述: |
| PPC440SPE-3GA667C | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PowerPC 440SPe Embedded Processor |
| PPC440SPE-3NA533C | 制造商:AppliedMicro 功能描述: |
| PPC440SPE-AGB533C | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PowerPC 440SPe Embedded Processor |
| PPC440SPE-AGB667C | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PowerPC 440SPe Embedded Processor |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。