
MSP430C32x, MSP430P325A
MIXED SIGNAL MICROCONTROLLER
SLAS219B – MARCH 1999 – REVISED MARCH 2000
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
NAME
I/O
DESCRIPTION
NO.
1
63
61
62
5–8
11
51–54
2
64
AVCC
AVSS
A0
A1
A2–A5
CIN
COM0–3
DVCC
DVSS
P0.0
P0.1/RXD
P0.2/TXD
P0.3–P0.7
Rext
RST/NMI
R03
R13
R23
R33
SVCC
S0
S1
S2–S5/O2–O5
S20/O20/CMPI
Positive analog supply voltage
Analog ground reference
Analog-to-digital converter input port 0 or digital input port 0
Analog-to-digital converter input port 1 or digital input port 1
Analog-to-digital converter inputs ports 2–5 or digital inputs ports 2–5
Input used as enable of counter TPCNT1 – Timer/Port
Common outputs, used for LCD backplanes – LCD
Positive digital supply voltage
Digital ground reference
I
I
I
I
O
18
19
20
I/O
I/O
I/O
I/O
I
I
I
I
I
O
General-purpose digital I/O
General-purpose digital I/O, receive digital input port, 8-bit Timer/Counter
General-purpose digital I/O, transmit data output port, 8-bit Timer/Counter
Five general-purpose digital I/Os, bit 3 to bit 7
Programming resistor input of internal current source
Reset input or non-maskable interrupt input
Input of fourth positive analog LCD level (V4) – LCD
Input of third positive analog LCD level (V3) – LCD
Input of second positive analog LCD level (V2) – LCD
Output of first positive analog LCD level (V1) – LCD
Switched AVCC to analog-to-digital converter
Segment line S0 – LCD
Segment line S1 – LCD
Segment lines S2 to S5 or digital output ports O2–O5, group 1 – LCD
Segment line S20 can be used as comparator input port CMPI – Timer/Port
21–25
4
59
29
28
27
26
3
30
31
32–35
50
O
O
O
I/O
S6–S9/O6–O9
S10–S13/O10–O13
S14–S17/O14–O17
S18-S19/O18-O19
TCK
TDO/TDI
TDI/VPP
TMS
TP0.0
36–39
40–43
44–47
48, 49
58
55
56
57
12
O
O
O
O
I
I/O
I
I
O
Segment lines S6 to S9 or digital output ports O6–O9, group 2 – LCD
Segment lines S10 to S13 or digital output ports O10–O13, group 3 – LCD
Segment lines S14 to S17 or digital output ports O14 to O17, group 4 – LCD
Segment lines S18 and S19 or digital output port O18 and O19, group 5 – LCD
Test clock, clock input terminal for device programming and test
Test data output, data output terminal or data input during programming
Test data input, data input terminal or input of programming voltage
Test mode select, input terminal for device programming and test
General-purpose 3-state digital output port, bit 0 – Timer/Port
TP0.1
13
O
General-purpose 3-state digital output port, bit 1 – Timer/Port
TP0.2
14
O
General-purpose 3-state digital output port, bit 2 – Timer/Port
TP0.3
15
O
General-purpose 3-state digital output port, bit 3 – Timer/Port
TP0.4
16
O
General-purpose 3-state digital output port, bit 4 – Timer/Port
TP0.5
17
I/O
General-purpose digital input/output port, bit 5 – Timer/Port
XBUF
Xin
60
9
O
I
Clock signal output of system clock MCLK or crystal clock ACLK
Input terminal of crystal oscillator
Xout/TCLK
10
I/O
Output terminal of crystal oscillator or test clock input