參數(shù)資料
型號： PMS430E325AFZ
廠商： Texas Instruments, Inc.
英文描述： MIXED SIGNAL MICROCONTROLLER
中文描述： 混合信號微控制器
文件頁數(shù)： 20/33頁
文件大小： 437K
代理商： PMS430E325AFZ
MSP430C32x, MSP430P325A
MIXED SIGNAL MICROCONTROLLER
SLAS219B – MARCH 1999 – REVISED MARCH 2000
20
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (continued)
current source (ADC)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
0.252
×
V(SVCC)
1600
UNIT
V(Rext)
Voltage, (Rext)
V(Rext) = V(SVCC) – V(RI),
I(RI) = 6 mA,
VCC = 3 V/5 V,
0.246
×
V(SVCC)
0.249
×
V(SVCC)
V
R(ext)
External resistor
VCC = 3 V/5 V
VCC = 3 V,
95
VA0..A3 = 0 .. 0.4
×
V(SVCC), IS =
V(Rext)/R(ext) = 1 mA
VA0..A3 = 0 .. 0.4
×
V(SVCC),
IS = V(Rext)/R(ext) = 6 mA
VA0..A3 = 0 .. 0.5
×
V(SVCC)
IS = V(Rext)/R(ext)= 1 mA
VA0..A3 = 0 .. 0.5
×
V(SVCC)
IS = V(Rext)/R(ext)= 6 mA
–1
1
μ
A
IS
Load compliance
VCC = 3 V,
–3.2
3.2
μ
A
VCC = 5 V,
–1.5
1.5
μ
A
VCC = 5 V,
–3.2
3.2
μ
A
A/D converter (f
(ADCLK)
= 1 MHz)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Resolution
12 + 2
bits
f(con)
Conversion frequency
f(con) = f(ADCLK)
)= f(ADCLK)
12-bit conversion
12+2-bit conversion
12-bit conversion
12+2-bit conversion
VCC= 3 V/5 V
VCC = 3 V/5 V
0.1
0.14
1.5
1.5
MHz
f(concyc)
Conversion cycles
f(ADCLK)= f(MCLK)/N
f(ADCLK) = f(MCLK)/N
VCC= 3 V/5 V
VCC = 3 V/5 V
96
132
cycles of
ADCLK
LSB Voltage
VCC = 3 V/5 V
VCC = 3 V/5 V
VCC = 3 V/5 V
VCC = 3 V/5 V
VCC = 3 V/5 V
0.000061
×
VSVCC
–2
–3
–7
–10
V
INL1
INL2
INL3
INL4
0
≤
DDV
≤
127
128
≤
DDV
≤
255
256
≤
DDV
≤
2047
2048
≤
DDV
≤
4095
2
3
7
LSB
Integral nonlinearity,
(see Note 18)
LSB
LSB
10
LSB
DNL
Differential nonlinearity,
(see Note 19)
VCC = 3 V/5 V
–1
1
LSB
dN/dT
Temperature stability
V(Rext)/R(ext) = 6mA, Range A
Range B
VCC= 3 V/5 V
VCC = 3 V/5 V
0.008
0.015
LSB/
°
C
dN/dV(SVCC)
V(SVCC)rejection ratio
Range A, B, V(Rext)/R(ext) = 1 mA,
SVCC
±
10%
VCC = 3 V/5 V
1.25
LSB/V
Range A
VCC = 3 V/5 V
–1.2
–0.49
0.24
% FSRA
(see Note 17)
Conversion offset 12 bit analog input to
digital value (see Note 16)
Range B
VCC = 3 V/5 V
–1.7
–0.6
0.49
% FSRB
(see Note 17)
Range C
VCC = 3 V/5 V
–1.8
–0.6
0.6
% FSRC
(see Note 17)
Range D
VCC = 3 V/5 V
–1.7
0.6
0.49
% FSRD
(see Note 17)
Conversion offset 14 bit analog input to
digital value (see Note 16)
Range ABCD
VCC = 3 V/5 V
–0.27
–0.06
0.13
%FSRABCD
(see Note 17)
Slope 12 bit
VCC = 3 V/5 V
VCC = 3 V/5 V
0.9925
1
1.0075
Slope 14 bit
0.9982
1
1.0018
C(IN)
R(SIN)
NOTES: 16. Offset referred to full scale 12/14 bit
17. FSRx: full scale range, separate for the four 12-bit ranges and the 14-bit (12+2) range.
18. DDV is short form of delta digital value. The DDV is a span of conversion results. It is assumed that the conversion is of 12 bit not
12+2 bit.
19. DNL is valid for all 12-bit ranges and the 14-bit (12+2) range.
Input capacitance
VCC = 3 V/5 V
VCC = 3 V/5 V
40
2
45
pF
Serial input resistance
k
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PMS430E325FZ 制造商:TI 制造商全稱:Texas Instruments 功能描述:MIXED SIGNAL MICROCONTROLLER
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