
SBSLITE Telecom Standard Product Data Sheet
Preliminary
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010883, Issue 2
6
Figure 33 Incoming TelecomBus to LVDS Functional Timing ......................................274
Figure 34 Incoming SBI Bus to LVDS Timing with DS0 Switching ...............................275
Figure 35 Receive LVDS Link Timing ...........................................................................276
Figure 36 Outgoing Synchronization Timing.................................................................276
Figure 37 Outgoing 77.76 MHz TelecomBus Functional Timing ..................................277
Figure 38 Outgoing SBI336 Functional Timing.............................................................278
Figure 39 Microprocessor Interface Read Timing.........................................................281
Figure 40 Microprocessor Interface Write Timing.........................................................283
Figure 41 SBSLITE Incoming Timing............................................................................285
Figure 42 SBSLITE Receive Timing..............................................................................286
Figure 43 SBSLITE Outgoing Timing............................................................................287
Figure 44 SBSLITE Transmit Timing.............................................................................287
Figure 45 JTAG Port Interface Timing...........................................................................288
Figure 46 160 Pin PBGA 15 x 15 mm Body..................................................................290