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| 型號(hào)： | PM73488-PI |
| 廠商： | PMC-SIERRA INC |
| 元件分類(lèi)： | 數(shù)字傳輸電路 |
| 英文描述： | 5 Gbit/s ATM Switch Fabric Element |
| 中文描述： | ATM SWITCHING CIRCUIT, PBGA596 |
| 封裝： | EPBGA-596 |
| 文件頁(yè)數(shù)： | 41/135頁(yè) |
| 文件大?。?/td> | 1735K |
| 代理商： | PM73488-PI |
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PMC-Sierra, Inc.
PM73488 QSE
L
PMC-980616
Issue 3
5 Gbit/s ATMSwitch Fabric Element
Released
Datasheet
43
The information bits encoding is described in Table 7.
3.2
The data acknowledge signals (BP_ACK_IN and BP_ACK_OUT) are used to indicate if, at the current cell time, a
cell was successfully transmitted or not. Data acknowledge is a single line per port that returns from a cell’s destina-
tion in the reverse direction from the data flow. If the cell is being blocked by the switch, this information is gener-
ated directly by the QSE. If the cell is not being blocked by the switch, this information is forwarded from the next
switch stage.
Data Acknowledge
The data acknowledge signal provides the following information to the QRT:
The cell was successfully received by the QRT at the cell destination (ACK).
The cell was not accepted by the QRT at the cell destination (does not happen by design in the PM73487).
The cell was blocked by the switch at the output of the switch fabric (refer to
section 9.3.30
“ACK_PAYLOAD” on page 109
).
The cell was blocked internal to the switch fabric (refer to
section 9.3.30 “ACK_PAYLOAD” on page 109
).
The cell was detected as a parity error cell by a QSE (refer to
section 9.3.30 “ACK_PAYLOAD” on
page 109
).
The cell was headed to a gang of which all ports are dead (refer to
section 9.3.31
“GANG_DEAD_ACK_PAYLOAD” on page 110
).
Thus, direct information is provided to the QRT on a per-cell basis and on a per-VC basis.
The QSE behavior to support the above scenario is as follows:
If the cell was a parity errored cell, and the QSE is configured to check parity in the CHIP_MODE register
(refer to the field labeled
“PARITY_CHECK” on page 95
), then the parity acknowledge in the
ACK_PAYLOAD register is sent (the default is ONACK).
If the cell is dropped due to congestion at an output of the QSE, then Ack Payload for cells dropped due to
congestion in the ACK_PAYLOAD register is sent (bits3:0). Refer to bits 3:0 in
section 9.3.31
“GANG_DEAD_ACK_PAYLOAD” on page 110
.
Table 7. Information Bit Encoding
Mode
Data 3
Data 2
Data 1
Data 0
Description
0
1 = Backpressure
on high-priority
multicast cell.
1 = Backpressure
on medium-priority
multicast cell.
1 = Backpressure
on low-priority
multicast cell.
0
Backpressure information.
This signal is present each cell time
regardless of whether a cell was
transmitted or not (on that link).
This signal is withheld if any problem
is detected on the input port.
1
0
0
0
0
Unassigned.
1
0
1
0
0
Signals MNACK.
1
1
0
0
0
Signals ONACK.
1
1
1
0
0
Signals ACK.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PM73488 | 5 Gbit/s ATM Switch Fabric Element |
| PM7349 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| PM7350 | Dual Serial Link, PHY Multiplexer |
| PM7350-PI | DUAL SERIAL LINK PHY MULTIPLEXER |
| PM7351 | OCTAL SERIAL LINK MULTIPLEXER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PM7349 | 制造商:PMC 制造商全稱(chēng):PMC 功能描述:Quad J2, E3 and DS-3 Framer |
| PM7349-BI | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Telecommunication IC |
| PM7350 | 制造商:PMC 制造商全稱(chēng):PMC 功能描述:DUAL SERIAL LINK PHY MULTIPLEXER |
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