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PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
PM7340 S/UNI-IMA-8
DATA SHEET
PMC-2001723
ISSUE 3
INVERSE MULTIPLEXING OVER ATM
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
194
Register 0x220-22C: RIPP Command Register
Address
Bit
Type
Function
Default
0x220
15
R/W
CMD_BUSY
0
14:10
R/W
CMD_CODE
0
9
R/W
CMD_ACK
0
8
Reserved
7:0
R/W
CMD_WR_DATA00
0
0X222
15:0
R/W
CMD_WR_DATA01_LSB
0
0X224
15:0
R/W
CMD_WR_DATA01_MSB
0
0X226
15:0
R/W
CMD_WR_DATA02_LSB
0
0X228
15:0
R/W
CMD_WR_DATA02_MSB
0
0X22A
15:0
R/W
CMD_WR_DATA03_LSB
0
0X22C
15:0
R/W
CMD_WR_DATA03_MSB
0
These array registers control the issuing of PM commands. Writing to the first
location in the array (0x30) causes a new command to be issued to RIPP. The
command operands are carried in the rest of the registers.
CMD_ACK:
This bit indicates whether a command has been accepted (logic high) or
rejected (logic low) by RIPP. It is updated by RIPP before the CMD_BUSY is
cleared.
CMD_CODE:
This is set by the microprocessor to indicate which command is being issued.
See Table 15
Command Register Encoding for the details.
CMD_BUSY:
This bit is set to ‘1’ internally upon detecting a microprocessor write to this
register location; the write indicates that a new command is being issued.
After the command is accepted by RIPP, RIPP clears the bit to ‘0’
asynchronously to indicate that it is now ready to take the next command.
RIPP will also update the CMD_ACK bit to indicate whether the command has