![](http://datasheet.mmic.net.cn/330000/PM7329-BI_datasheet_16444382/PM7329-BI_126.png)
PM7329 S/UNI-APEX-1K800
DATASHEET
PMC-2010141
ISSUE 2
ATM TRAFFIC MANAGER AND SWITCH
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
112
LoopTxECIPreEn:
When reset to zero, a ECI prepend (Word 2 in Figure 6, Byte 3&4 in Figure 7)
is not present on this interface. When set to one a ECI prepend is present on
this interface.
LoopTxSwitchPreEn
When reset to zero, a switch tag prepend (Word 1 in Figure 6, Byte 1&2 in
Figure 7) is not present for this interface. When set to a one a switch tag is
present for this interface.
LoopTxHecDis
When reset to zero, the ECI is generated on the HEC/UDF field (Word 5 in
Figure 6, Byte 9 in Figure 7) in this interface. When set to a one an HEC/UDF
field is not generated on this interface.
LoopTx8bitEn
When reset to zero, this bit sets the interface bus width to 16 bits. When set
to one, this bit sets the interface bus width to 8 bit.
LoopTxParPolarity
When reset to zero, the loop transmit parity is odd. When set to one, the
loop transmit parity is even.
LoopTxSlaveAddr[4:0]
The five bit UTOPIA Address to which the slave will respond. Used only
when the loop Tx interface is configured for UTOPIA L2 slave.
LoopTxSchEn
The LoopTxSchEn enables the loop port scheduler for normal operation. The
LoopTxSchEn enable should be set to a ‘1’ for normal operation after the
initialization of the loop’s class not empty context memory.
LoopTxTwoCellEn
When set to 0, the loop port scheduler will allow a maximum one cell per port
in the transmit pipeline for each LTPA. When set to 1, the loop port scheduler
will allow a maximum of two cells per port in the transmit pipeline for each
LTPA.
LoopTxPfThres[4:0]
Controls the depth of the poll request FIFO, offset by 1. A value of 0
represents poll depth of 1. Recommended value is 0x1f.