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參數(shù)資料
| 型號(hào)： | PM7323-SI |
| 廠商： | PMC-SIERRA INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | ROUTING CONTROL, MONITORING, & POLICING 200 MBPS |
| 中文描述： | ATM SWITCHING CIRCUIT, PQFP240 |
| 封裝： | 32 X 32 MM, 3.40 MM HEIGHT, 0.50 MM PITCH, HEAT SINK, PLASTIC, QFP-240 |
| 文件頁(yè)數(shù)： | 72/219頁(yè) |
| 文件大?。?/td> | 695K |
| 代理商： | PM7323-SI |
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STANDARD PRODUCT
PM7323 RCMP-200
DATASHEET
PMC-960543
ISSUE 2
ROUTING CONTROL, MONITORING, & POLICING
200 MBPS
Proprietary and Confidential to PMC-Sierra, Inc.
and for its Customer’s Internal Use.
61
Note:
Multicasting has limited utility in the ingress direction. Because the cells for all
VCs are queued at the Output Cell Interface, multicasting may result in head-of-
the-line blocking. Provided the multicasting cannot result in an instantaneous
rate greater than the bandwidth supported by the Output Cell Interface (e.g.
200Mbit/s with a 25MHz 8-bit bus), no problems shall occur. It is the Connection
Admission Control entity's responsibilty to ensure the traffic is within the rate
supported.
Cell counting, cell rate policing and OAM processing is performed on the
received cell, if so enabled. Therefore, the connection statistics for the multicast
group are available in the VC Table Record at the head of the linked list. If the
received cell is discarded due to policing, no multicasted cells are created. If the
received cell is tagged, all multicasted cells are also tagged.
For multicast connections not at the head of the linked list, policing and cell
counting are suppressed, in order to conserve bandwidth. The CLP=1, CLP=0
and non-compliant counts are not valid.
Each branch connection has its own VC Table Record. Therefore, header
translation and OAM is supported independently for each branch.
9.5
Output Buffering
The output buffer consists of a four cell FIFO which transfers the oldest cell to the
switch port whenever it signals that it will accept a cell. The FIFO output is a
slave to the switch port. If the output buffer becomes full, it provides back-
pressure to the Cell Processor which in turn back-pressures the Input Cell
Interface.
9.6
Congestion Control
Congestion control is handled by a single signal, CONG, entering the device.
When this signal indicates that congestion is being experienced by the switch
core, all low priority cells (high CLP bit) are discarded. This includes cells which
are made low priority during the policing process.
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相關(guān)代理商/技術(shù)參數(shù) |
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| PM7324 | 制造商:PMC 制造商全稱:PMC 功能描述:S/UNI-ATM LAYER SOLUTION |
| PM7324BI | 制造商:PMC-Sierra 功能描述: |
| PM7324-BI | 制造商:PMC 制造商全稱:PMC 功能描述:S/UNI-ATM LAYER SOLUTION |
| PM7325 | 制造商:PMC 制造商全稱:PMC 功能描述:2.4 Gbit/s ATM Layer Solution |
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