![](http://datasheet.mmic.net.cn/330000/PM7323_datasheet_16444372/PM7323_112.png)
STANDARD PRODUCT
PM7323 RCMP-200
DATASHEET
PMC-960543
ISSUE 2
ROUTING CONTROL, MONITORING, & POLICING
200 MBPS
Proprietary and Confidential to PMC-Sierra, Inc.
and for its Customer’s Internal Use.
101
asserted returns the first word of the cell. Subsequent reads of the
Microprocessor Cell Data register return the remaining words in the cell.
When the cell contents are exhausted, the DREQ output is deasserted even if
more cells are contained in the cell buffer. This eases the identification of cell
boundaries.
If DMAEN is a logic 0, the DREQ output is held deasserted.
EXTPHYID:
The extract physical link identification (EXTPHYID) bit allows the HEC byte of
each extracted cell to be overwritten with physical link identification
associated with the extracted cell, which is indicated on the IPHYID[4:0]
inputs as the cell is stored in the extract buffer. The IPHYID will consist of a 5-
bit number in the range 0 to 31, and will be right justified within the HEC byte
of the cell. A value of 0 represents PHY 1, a value of 1 represents PHY 2,
etc. up to PHY 32.
If EXTPHYID is set to a logic 1, the HEC byte will be overwritten.
If EXTPHYID is set to a logic 0, the HEC byte will be unchanged.
RESTART:
The restart cell read (RESTART) bit resets the microprocessor cell read
pointer. If RESTART is set to a logic 1 during a cell read, the next word read
from the Microprocessor Cell Data register will be the first word of the current
cell. Subsequent reads from the Microprocessor Cell Data register return the
remaining words in the cell.
RESTART is not readable and is cleared upon a read of the Microprocessor
Cell Data register (0x12).
ABORT:
The read abort (ABORT) bit allows the microprocessor to discard a cell
without reading the remaining contents. If ABORT is set to a logic 1, the
current cell being read is purged from the buffer and the DREQ output will be
deasserted.
ABORT is not readable and is cleared upon a read of the Microprocessor Cell
Data register (0x12).