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2001 Microchip Technology Inc.
Advance Information
DS70025D-page 9
dsPIC30F
FIGURE 1-6:
PROGRAM SPACE
MEMORY MAP
User Program Space
1.4
DSP Engine
The DSP engine is a block of hardware which is fed
data from the W register array, but contains its own
specialized result registers. It is controlled from the
same single issue instruction decoder that directs the
MCU ALU. In addition, all operand effective addresses
are generated in the W register array. Some DSP
instructions (e.g., ED and EDAC instructions) utilize
both the DSP engine and the MCU ALU resources
concurrently. The DSP engine consists of a high
speed 16-bit x 16-bit multiplier, a barrel shifter and a
40-bit adder/subtractor with two target registers, round
and saturation logic.
Data input to the DSP engine is derived from:
1.
Directly the W array (registers W0, W1, W2 or
W3) for the MAC class of instructions (MAC,
MSA, MPY, MPYN, SQR, SQRAC, CLRAC and
MOVSAC) and MCU multiply instructions.
2.
The X-bus for all other DSP instructions
3.
The X-bus for all MCU instructions which use
the barrel shifter
Data output from the DSP engine is written to:
1.
The target accumulator, as defined by the DSP
instruction being executed
2.
The X-bus for MAC, MSA, CLRAC and
MOVSAC accumulator writes where the EA is
derived from W9 only (MPY, MPYN, SQR and
SQRAC do not offer an accumulator write
option)
3.
The X-bus for all MCU instructions which use
the barrel shifter
4.
The W array for some MCU multiply instructions.
The DSP engine also has the capability to perform
inherent accumulator to accumulator operations which
require no additional data. These instructions are
ADDAB, SUBAB and NEGAC.
A block diagram of the DSP engine is shown in
Figure 1-7.
0x000000
0x000002
0x000004
0x000006
0x00000A
0x00000C
0x00000E
0x00000F
0x000010
0x000012
0x000014
0x000016
0x000018
0x00001A
0x00001C
0x00001E
0x000020
Reset
Ext. Osc. Fail Trap
Stack Error Trap
Address Error Trap
Arithmetic Warn. Trap
Software Trap
Reserved
Reserved
Priority Interrupt 7
Priority Interrupt 6
Priority Interrupt 5
Priority Interrupt 4
Priority Interrupt 3
Priority Interrupt 2
Priority Interrupt 1
Priority Interrupt 0
User Program Space
0x7FFFFE