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參數資料
| 型號： | PIC30F2010 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | dsPIC High-Performance 16-bit Digital Signal Controller Family Overview |
| 中文描述： | dsPIC數字信號的高性能16位數字信號控制器系列簡介 |
| 文件頁數： | 31/34頁 |
| 文件大?。?/td> | 500K |
| 代理商： | PIC30F2010 |
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2001 Microchip Technology Inc.
Advance Information
DS70025D-page 31
dsPIC30F
The module features are as follows:
Implementation of the CAN protocol
Standard and extended data frames
0 - 8 bytes data length
Programmable bit rate up to 1 Mb/sec
Support for remote frames
Double buffered receiver with two prioritized
received message storage buffers
6 full (standard/extended identifier) acceptance fil-
ters, 2 associated with the high priority receive
buffer, and 4 associated with the low priority
receive buffer
2 full acceptance filter masks, one each associ-
ated with the high and low priority receive buffers
Three transmit buffers with application-specified
prioritization and abort capability
Programmable wake-up functionality with inte-
grated low-pass filter
Programmable loop-back mode and programma-
ble state clocking supports self-test operation
Signaling via interrupt capabilities for all CAN
receiver and transmitter error states
Programmable clock source
Programmable link to timer module for time-
stamping and network synchronization
Low power SLEEP mode
FIGURE 6-11:
CAN MODULE BLOCK DIAGRAM
3 TX
Buffers
2 RX Buffers
Message Assembly
Buffer
6 Acceptance
Filters
CPU
Interface
Logic
Bit Stream
Processor
Error
Management
Logic
Bit Timing
Logic
Clock
Generator
CPU
Bus
INT
Q Clocks
RX
TX
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