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參數(shù)資料
| 型號(hào)： | PIC30F2010 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | dsPIC High-Performance 16-bit Digital Signal Controller Family Overview |
| 中文描述： | dsPIC數(shù)字信號(hào)的高性能16位數(shù)字信號(hào)控制器系列簡(jiǎn)介 |
| 文件頁數(shù)： | 28/34頁 |
| 文件大?。?/td> | 500K |
| 代理商： | PIC30F2010 |
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dsPIC30F
DS70025D-page 28
Advance Information
2001 Microchip Technology Inc.
6.9
UART MODULE
This is the description of a Universal Asynchronous
Receiver/Transmitter Communications module. The
UART module is defined closely to match the USART
module from the PIC18C family with a few key differ-
ences. The dsPIC products will have one or more
UART
’
s.
6.9.1
OVERVIEW OF FEATURES
The key features of the UART module are:
Full-duplex operation with 8- or 9-bit data
Even, Odd or No Parity options (for 8-bit data)
One or two stop bits
Hardware flow control option with CTS and RTS
pins
Fully integrated Baud Rate Generator with 16-bit
prescaler
Baud rates range from up to 2.5Mbps and down to
38Hz at 40MIPS
4-byte deep transmit data buffer
4-byte deep receive data buffer
Parity, Framing and Buffer Overrun error detection
16X Baud Clock output for IrDA support
Support for Interrupt only on Address Detect (9th
bit=1)
Separate Transmit and Receive Interrupts
Loopback mode for diagnostics
6.10
I
2
C
MODULE
This document describes the Inter-Integrated Circuit
(I
2
C) function that offers full hardware support for both
slave and multi-master modes, with a 16-bit interface.
Figure 6-9 shows an I
2
C receive block diagram and
Figure 6-10 shows an I
2
C transmit block diagram.
6.10.1
Inter-Integrated Circuit (I
2
C) interface
I
2
C interface supports both master and slave
modes.
I
2
C slave mode supports 7- and 10-bit address.
I
2
C master mode supports 7- and 10-bit address.
I
2
C port allows bidirectional transfers between
master and slaves.
Serial clock synchronization for I
2
C port can be
used as a handshake mechanism to suspend and
resume serial transfer.
I
2
C supports multi-master mode. Detects bus col-
lision and will arbitrate accordingly.
FEATURES OVERVIEW
6.10.2
OPERATING FUNCTION
DESCRIPTION
The I
2
C module is a synchronous serial interface useful
for communicating with other peripheral or microcon-
troller devices. These peripheral devices may be Serial
EEPROMs, shift registers, display drivers, A/D convert-
ers, etc.
6.10.3
INTER-INTEGRATED CIRCUIT (I
2
C)
The I
2
C module hardware fully implements all the mas-
ter and slave functions of the I
2
C standard and fast
mode specifications, as well as 7- and 10-bit address-
ing.
Thus the I
2
C module can operate as a slave, or a mas-
ter on an I
2
C bus.
6.10.4
VARIOUS I
2
C MODES
There are no control bits to select a specific mode.
However, all of the following modes are supported:
I
2
C slave mode (7-bit address)
I
2
C slave mode (10-bit address)
I
2
C master mode (7- or 10-bit address)
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