![](http://datasheet.mmic.net.cn/260000/PIC16F77_datasheet_15942844/PIC16F77_159.png)
2000 Microchip Technology Inc.
Advance Information
DS30325A-page 159
PIC16F7X
INDEX
A
A/D .....................................................................................89
ADCON0 Register ......................................................89
ADCON1 Register ......................................................90
Analog Input Model Block Diagram ............................92
Analog Port Pins ......................................7, 8, 9, 37, 38
Analog-to-Digital Converter ........................................89
Block Diagram ............................................................91
Configuring Analog Port Pins .....................................93
Configuring the Interrupt ............................................91
Configuring the Module ..............................................91
Conversion Clock .......................................................93
Conversions ...............................................................93
Converter Characteristics ........................................144
Effects of a RESET ....................................................93
Faster Conversion - Lower Resolution Tradeoff ........93
Internal Sampling Switch (Rss) Impedance ...............92
Operation During SLEEP ...........................................93
Sampling Requirements .............................................92
Source Impedance .....................................................92
Timing Diagram ........................................................145
Using the CCP Trigger ...............................................93
Absolute Maximum Ratings .............................................125
ACK ..............................................................................67, 69
ADRES Register ..........................................................15, 89
Analog Port Pins.
See
A/D
Application Notes
AN552 (Implementing Wake-up on Key Strokes Using
PIC16F7X) .................................................................31
AN556 (Table Reading Using PIC16CXX ..................26
AN578 (Use of the SSP Module in the I
2
C Multi-Master
Environment) ..............................................................61
Architecture
PIC16F73/PIC16F76 Block Diagram ...........................5
PIC16F74/PIC16F77 Block Diagram ...........................6
Assembler
MPASM Assembler ..................................................119
B
Banking, Data Memory ......................................................12
BF ................................................................................62, 67
Block Diagrams
A/D .............................................................................91
Analog Input Model ....................................................92
Capture ......................................................................57
Compare ....................................................................58
I
2
C Mode ....................................................................67
PWM ..........................................................................58
SSP in I
2
C Mode ........................................................67
SSP in SPI Mode .......................................................64
Timer0/WDT Prescaler ..............................................45
Timer2 ........................................................................53
USART Receive .........................................................79
USART Transmit ........................................................77
BOR.
See
Brown-out Reset
BRGH bit ............................................................................75
Brown-out Reset (BOR) ...............................95, 99, 101, 102
Buffer Full Status bit, BF ....................................................62
C
Capture/Compare/PWM
Capture
Block Diagram ...................................................57
CCP1CON Register ...........................................56
CCP1IF .............................................................. 57
Mode ................................................................. 57
Prescaler ........................................................... 57
CCP Timer Resources ............................................... 55
Compare
Block Diagram ................................................... 58
Mode ................................................................. 58
Software Interrupt Mode .................................... 58
Special Event Trigger ........................................ 58
Special Trigger Output of CCP1 ........................ 58
Special Trigger Output of CCP2 ........................ 58
Interaction of Two CCP Modules ............................... 55
Section ....................................................................... 55
Special Event Trigger and A/D Conversions ............. 58
Capture/Compare/PWM (CCP)
CCP1
RC2/CCP1 Pin ................................................. 7, 8
CCP2
RC1/T1OSI/CCP2 Pin ..................................... 7, 8
PWM Block Diagram ................................................. 58
PWM Mode ................................................................ 58
CCP1CON ......................................................................... 17
CCP2CON ......................................................................... 17
CCPR1H Register .................................................. 15, 17, 55
CCPR1L Register ........................................................ 17, 55
CCPR2H Register ........................................................ 15, 17
CCPR2L Register ........................................................ 15, 17
CCPxM0 bit ........................................................................ 56
CCPxM1 bit ........................................................................ 56
CCPxM2 bit ........................................................................ 56
CCPxM3 bit ........................................................................ 56
CCPxX bit .......................................................................... 56
CCPxY bit .......................................................................... 56
CKE ................................................................................... 62
CKP ................................................................................... 63
Clock Polarity Select bit, CKP ............................................ 63
Code Examples
Call of a Subroutine in Page 1 from Page 0 .............. 26
Indirect Addressing .................................................... 27
Code Protection ......................................................... 95, 110
Computed GOTO ............................................................... 26
Configuration Bits .............................................................. 95
Conversion Considerations .............................................. 157
D
D/A ..................................................................................... 62
Data Memory ..................................................................... 12
Bank Select (RP1:RP0 Bits) ...................................... 12
General Purpose Registers ....................................... 12
Register File Map ................................................ 13, 14
Special Function Registers ........................................ 15
Data/Address bit, D/A ........................................................ 62
DC Characteristics ........................................................... 127
Development Support ...................................................... 119
Device Differences ........................................................... 157
Device Overview .................................................................. 5
Direct Addressing .............................................................. 27
E
Electrical Characteristics ................................................. 125
Errata ................................................................................... 4
External Clock Input (RA4/T0CKI).
See
Timer0
External Interrupt Input (RB0/INT).
See
Interrupt Sources