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參數(shù)資料
| 型號： | PI7C8150ND |
| 廠商： | Pericom Semiconductor Corp. |
| 英文描述： | 2-Port PCI-to-PCI Bridge |
| 中文描述： | 2端口PCI至PCI橋 |
| 文件頁數(shù)： | 88/106頁 |
| 文件大?。?/td> | 904K |
| 代理商： | PI7C8150ND |
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PI7C8150
2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
78
August 22, 2002 – Revision 1.02
2
Primary MEMW
Command Alias
Enable
R/W
Controls PI7C8150’s detection mechanism for matching non-posted
memory write retry cycles from the initiator on the primary interface
0: exact matching for non-posted memory write retry cycles from
initiator on the primary interface
1: alias MEMWI to MEMW for non-posted memory write retry
cycles from initiator on the primary interface
Reset to 0
Controls PI7C8150’s detection mechanism for matching memory
read retry cycles from the initiator on the secondary
3
Secondary
MEMR
Command Alias
Enable
R/W
0: exact matching for memory read retry cycles from initiator on the
secondary interface
1: alias MEMRL or MEMRM to MEMR for memory read retry
cycles from initiator on the secondary interface
Reset to 0
Controls PI7C8150’s detection mechanism for matching non-posted
memory write retry cycles from the initiator on the primary interface
4
Secondary
MEMW
Command Alias
Enable
R/W
0: exact matching for non-posted memory write retry cycles from
initiator on the secondary interface
1: alias MEMWI to MEMW for non-posted memory write retry
cycles from initiator on the secondary interface
Reset to 0
Reserved. Returns 0 when read. Reset to 0.
Controls PI7C8150’s ability to enable long requests for lock cycles
8:5
Reserved
R/O
9
Enable Long
Request
R/W
0: normal lock operation
1: enable long request for lock cycle
Reset to 0
Control’s PI7C8150’s ability to enable the secondary bus to hold
requests longer.
10
Enable
Secondary To
Hold Request
Longer
R/W
0: internal secondary master will release REQ_L after FRAME_L
assertion
1: internal secondary master will hold REQ_L until there is no
transactions pending in FIFO or until terminated by target
Reset to 1
Control’s PI7C8150’s ability to hold requests longer at the Primary
Port.
11
Enable Primary
To Hold Request
Longer
R/W
0: internal Primary master will release REQ_L after FRAME_L
assertion
1: internal Primary master will hold REQ_L until there is no
transactions pending in FIFO or until terminated by target
Reset to 1
Reserved. Returns 0 when read. Reset to 0.
15:12
Reserved
R/O
14.1.43
RETRY COUNTER REGISTER – OFFSET 78h
Bit
Function
Type
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PI90LV01 | SOTiny LVDS High-Speed Differential Line Driver |
| PI90LVB01 | SOTiny LVDS High-Speed Differential Line Driver |
| PI90LV022 | KPSE 5C 5#16 SKT PLUG |
| PI90LVB022 | LVDS Mux/Repeater |
| PI90LVB022B | LVDS Mux/Repeater |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C8150ND-33 | 制造商:Pericom Semiconductor Corporation 功能描述:PCI-to-PCI Bridge 256-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI to PCI Bridge 256-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI BUS CONTROLLER, PBGA256 |
| PI7C8152 | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:ENHANCED 2- PORT TO PCI BRIDGE INTEL 21152 COMPORISON |
| PI7C8152A | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2-Port PCI-to-PCI Bridge |
| PI7C8152A_07 | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2-Port PCI-to-PCI Bridge |
| PI7C8152AMA | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2-Port PCI-to-PCI Bridge |
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