- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄365364 > PI7C8150ND (Pericom Semiconductor Corp.) 2-Port PCI-to-PCI Bridge PDF資料下載
參數(shù)資料
| 型號： | PI7C8150ND |
| 廠商： | Pericom Semiconductor Corp. |
| 英文描述： | 2-Port PCI-to-PCI Bridge |
| 中文描述： | 2端口PCI至PCI橋 |
| 文件頁數(shù)： | 75/106頁 |
| 文件大?。?/td> | 904K |
| 代理商： | PI7C8150ND |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁當(dāng)前第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁
PI7C8150
2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
65
August 22, 2002 – Revision 1.02
20
Capabilities List
R/O
Set to 1 to enable support for the capability list (offset 34h is the
pointer to the data structure)
Reset to 1
Set to 1 to enable 66MHz operation on the primary interface
21
66MHz Capable
R/O
Reset to 1
Reset to 0
Set to 1 to enable decoding of fast back-to-back transactions on the
primary interface to different targets
22
23
Reserved
Fast Back-to-
Back Capable
R/O
R/O
Reset to 1
Set to 1 when P_PERR_L is asserted and bit 6 of command register
is set
24
Data Parity Error
Detected
R/WC
Reset to 0
DEVSEL_L timing (medium decoding)
26:25
DEVSEL_L
timing
R/O
00: fast DEVSEL_L decoding
01: medium DEVSEL_L decoding
10: slow DEVSEL_L decoding
11: reserved
Reset to 01
Set to 1 (by a target device) whenever a target abort cycle occurs
27
Signaled Target
Abort
R/WC
Reset to 0
Set to 1 (by a master device) whenever transactions are terminated
with target aborts
28
Received Target
Abort
R/WC
Reset to 0
Set to 1 (by a master) when transactions are terminated with Master
Abort
29
Received Master
Abort
R/WC
Reset to 0
Set to 1 when P_SERR_L is asserted
30
Signaled System
Error
R/WC
Reset to 0
Set to 1 when address or data parity error is detected on the primary
interface
31
Detected Parity
Error
R/WC
Reset to 0
14.1.5
REVISION ID REGISTER – OFFSET 08h
Bit
7:0
Function
Revision
Type
R/O
Description
Indicates revision number of device. Hardwired to 01h
14.1.6
CLASS CODE REGISTER – OFFSET 08h
Bit
15:8
Function
Programming
Interface
Sub-Class Code
Base Class Code
Type
R/O
Description
Read as 0 to indicate no programming interfaces have been defined
for PCI-to-PCI bridges
Read as 04h to indicate device is PCI-to-PCI bridge
Read as 06h to indicate device is a bridge device
23:16
31:24
R/O
R/O
14.1.7
CACHE LINE SIZE REGISTER – OFFSET 0Ch
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PI90LV01 | SOTiny LVDS High-Speed Differential Line Driver |
| PI90LVB01 | SOTiny LVDS High-Speed Differential Line Driver |
| PI90LV022 | KPSE 5C 5#16 SKT PLUG |
| PI90LVB022 | LVDS Mux/Repeater |
| PI90LVB022B | LVDS Mux/Repeater |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C8150ND-33 | 制造商:Pericom Semiconductor Corporation 功能描述:PCI-to-PCI Bridge 256-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI to PCI Bridge 256-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI BUS CONTROLLER, PBGA256 |
| PI7C8152 | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:ENHANCED 2- PORT TO PCI BRIDGE INTEL 21152 COMPORISON |
| PI7C8152A | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2-Port PCI-to-PCI Bridge |
| PI7C8152A_07 | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2-Port PCI-to-PCI Bridge |
| PI7C8152AMA | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2-Port PCI-to-PCI Bridge |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。