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參數(shù)資料
| 型號(hào)： | PI7C7300ANA |
| 廠商： | Pericom Semiconductor Corp. |
| 英文描述： | 3-PORT PCI-to-PCI BRIDGE |
| 中文描述： | 3端口PCI至PCI橋 |
| 文件頁數(shù)： | 14/109頁 |
| 文件大?。?/td> | 779K |
| 代理商： | PI7C7300ANA |
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PI7C7300A
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 14 OF 109
09/25/03 Revision 1.09
Name
P_IRDY#
Pin #
V13
Type
PSTS
Description
Primary IRDY (Active LOW).
Driven by the
initiator of a transaction to indicate its ability to
complete current data phase on the primary side. Once
asserted in a data phase, it is not de-asserted until the
end of the data phase. Before tri-stated, it is driven to a
de-asserted state for one cycle.
Primary TRDY (Active LOW).
Driven by the target
of a transaction to indicate its ability to complete
current data phase on the primary side. Once asserted
in a data phase, it is not de-asserted until the end of the
data phase. Before tri-stated,
it is driven to a de-asserted state for one cycle.
Primary Device Select (Active LOW).
Asserted by
the target indicating that the device is accepting the
transaction. As a master, PI7C7300A waits for the
assertion of this signal within 5 cycles of P_FRAME#
assertion; otherwise, terminate with master abort.
Before tri-stated, it is driven to a
de-asserted state for one cycle.
Primary STOP (Active LOW).
Asserted by the target
indicating that the target is requesting the initiator to
stop the current transaction. Before tri-stated, it is
driven to a de-asserted state for one cycle.
Primary LOCK (Active LOW).
Asserted by the
master for multiple transactions to complete.
Primary ID Select.
Used as a chip select line for Type
0 configuration accesses to PI7C7300A configuration
space.
Primary Parity Error (Active LOW).
Asserted when
a data parity error is detected for data received on the
primary interface. Before being tri-stated, it is driven
to a de-asserted state for one cycle.
Primary System Error (Active LOW).
Can be
driven LOW by any device to indicate a system error
condition. PI7C7300A drives this pin on:
!
Address parity error
!
Posted write data parity error on target bus
!
Secondary S1_SERR# or S2_SERR# asserted
!
Master abort during posted write transaction
!
Target abort during posted write transaction
!
Posted write transaction discarded
!
Delayed write request discarded
!
Delayed read request discarded
!
Delayed transaction master timeout
This signal requires an external pull-up resistor for
proper operation.
Primary Request (Active LOW).
This is asserted by
PI7C7300A to indicate that it wants to start a
transaction on the primary bus. PI7C7300A de-asserts
this pin for at least 2 PCI clock cycles before asserting
it again.
Primary Grant (Active LOW).
When asserted,
PI7C7300A can access the primary bus. During idle
and P_GNT# asserted, PI7C7300A will drive P_AD,
P_CBE, and P_PAR to valid logic levels.
Primary RESET (Active LOW).
When P_RESET# is active, all PCI signals should be
asynchronously tri-stated.
P_TRDY#
U13
PSTS
P_DEVSEL#
Y14
PSTS
P_STOP#
W14
PSTS
P_LOCK#
V14
PSTS
P_IDSEL
Y10
PI
P_PERR#
Y15
PSTS
P_SERR#
W15
POD
P_REQ#
W6
PTS
P_GNT#
U7
PI
P_RESET#
Y5
PI
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PI7C8140A | 2 PORT PCI TO PCI BRIDGE PLX PCI 6140 COMPARISON |
| PI7C8148B | 2-PORT PCI-to-PCI BRIDGE PLX PC16152 COMPARISON |
| PI7C8150B-33 | PCI Bridge | Asynchronous 2-Port PCI Bridge |
| PI7C8152B | PCI Bridge | Asynchronous 2-Port PCI Bridge |
| PI7C8154 | PCI Bridge | 2-Port PCI-to-PCI Bridge |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C7300ANAE | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 3 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C7300ANA-E | 制造商:Pericom Semiconductor Corporation 功能描述:PCI-to-PCI Bridge 272-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI to PCI Bridge 272-Pin BGA |
| PI7C7300DNAE | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI PCI -to -PCI Bridge 3 Port RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C7300EVB | 功能描述:界面開發(fā)工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| PI7C8140A | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2 PORT PCI TO PCI BRIDGE PLX PCI 6140 COMPARISON |
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