參數(shù)資料
型號： PHK24NQ04LT
廠商： NXP SEMICONDUCTORS
元件分類： 小信號晶體管
英文描述： TrenchMOS logic level FET
中文描述： 21200 mA, 40 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, MS-012
封裝： PLASTIC, SO-8
文件頁數(shù)： 5/12頁
文件大小： 240K
代理商： PHK24NQ04LT
Philips Semiconductors
PHK24NQ04LT
TrenchMOS logic level FET
Product data
Rev. 01 — 12 September 2003
5 of 12
9397 750 11709
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
5.
Characteristics
Table 4:
T
j
= 25
°
C unless otherwise specified.
Symbol Parameter
Static characteristics
V
(BR)DSS
drain-source breakdown voltage
Characteristics
Conditions
Min
Typ
Max
Unit
I
D
= 250
μ
A; V
GS
= 0 V
T
j
= 25
°
C
T
j
=
55
°
C
I
D
= 1 mA; V
DS
= V
GS
;
Figure 9
T
j
= 25
°
C
T
j
= 150
°
C
T
j
=
55
°
C
V
DS
= 40 V; V
GS
= 0 V
T
j
= 25
°
C
T
j
= 150
°
C
V
GS
=
±
16 V; V
DS
= 0 V
V
GS
= 4.5 V; I
D
= 12 A;
Figure 7
and
8
T
j
= 25
°
C
T
j
= 150
°
C
V
GS
= 10 V; I
D
= 14 A;
Figure 7
and
8
40
36
-
-
-
-
V
V
V
GS(th)
gate-source threshold voltage
1
0.6
-
1.5
-
-
2
-
2.2
V
V
V
I
DSS
drain-source leakage current
-
-
-
0.05
-
10
1
500
100
μ
A
μ
A
nA
I
GSS
R
DSon
gate-source leakage current
drain-source on-state resistance
-
-
-
7.8
14
6.5
9.2
16.6
7.7
m
m
m
Dynamic characteristics
Q
g(tot)
total gate charge
Q
gs
gate-source charge
Q
gd
gate-drain (Miller) charge
C
iss
input capacitance
C
oss
output capacitance
C
rss
reverse transfer capacitance
t
d(on)
turn-on delay time
t
r
rise time
t
d(off)
turn-off delay time
t
f
fall time
Source-drain diode
V
SD
source-drain (diode forward) voltage I
S
= 2.3 A; V
GS
= 0 V;
Figure 12
t
rr
reverse recovery time
Q
r
recovered charge
I
D
= 14 A; V
DD
= 20 V; V
GS
= 10 V;
Figure 13
-
-
-
-
-
-
-
-
-
-
64
7.7
11.5
2985 -
490
240
30
30
60
40
-
-
-
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz;
Figure 11
-
-
-
-
-
-
V
DD
= 20 V; I
D
= 1 A; V
GS
= 5 V; R
G
= 6
-
-
-
0.75
49
36
1.2
-
-
V
ns
nC
I
S
= 2 A; dI
S
/dt =
100 A/
μ
s; V
GS
= 0 V
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